Page 2
RF65
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3.4.15.
Frequency Error Indicator.......................................................................................................................
26
3.4.16.
Automatic Frequency Correction ............................................................................................................
27
3.4.17.
Optimized Setup for Low Modulation Index Systems .............................................................................
28
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Table of Contents
Page
1.
General Description ................................................................................................................................................. 8
1.1.
Simplified Block Diagram .................................................................................................................................8
1.2.
Pin and Marking Diagram................................................................................................................................... 9
1.3.
Pin Description ......................................................................................................................................10
2.
Electrical Characteristics.......................................................................................................................................... 11
2.1.
ESD Notice....................................................................................................................................................... 11
2.2.
Absolute Maximum Ratings ...................................................................................................................11
2.3.
Operating Range.............................................................................................................................................. 11
2.4.
Chip Specification ................................................................................................................................ 12
2.4.1. Power Consumption ................................................................................................................................. 12
2.4.2. Frequency Synthesis ................................................................................................................................ 12
2.4.3. Receiver ..................................................................................................................................................... 13
2.4.4. Digital Specification .................................................................................................................................. 14
3.
Chip Description...................................................................................................................................................... 15
3.1.
Power Supply Strategy..................................................................................................................................... 15
3.2.
Low Battery Detector........................................................................................................................................ 15
3.3.
Frequency Synthesis........................................................................................................................................ 15
3.3.1. Reference Oscillator ................................................................................................................................. 15
3.3.2. CLKOUT Output .......................................................................................................................................16
3.3.3. PLL Architecture ....................................................................................................................................... .16
3.3.4. Lock Time .................................................................................................................................................17
3.3.5. Lock Detect Indicator................................................................................................................................. 17
3.4.
Receiver Description ...............................................................................................................................17
3.4.1. Block Diagram ........................................................................................................................................... 17
3.4.2. LNA - Single to Differential Buffer .............................................................................................................18
3.4.3. Automatic Gain Control ............................................................................................................................. 18
3.4.4. Continuous-Time DAGC............................................................................................................................ 20
3.4.5. Quadrature Mixer - ADCs - Decimators..................................................................................................... 20
3.4.6. Channel Filter ............................................................................................................................................20
3.4.7. DC Cancellation ........................................................................................................................................21
3.4.8. Complex Filter - OOK ................................................................................................................................22
3.4.9. RSSI ............................................................................................................................................................ 22
3.4.10. Cordic ........................................................................................................................................................ 22
3.4.11. Bit Rate Setting .......................................................................................................................................22
3.4.12. FSK Demodulator ....................................................................................................................................23
3.4.13. OOK Demodulator ..................................................................................................................................24
3.4.14. Bit Synchronizer .................................................................................................................................... 26
