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HT66FV1x0  Integrated Audio Amplifier Application Guideline 

 

AN0486EN  V1.10 

9 / 16 

June 8, 2021 

Power On/Off Pop Noise 

Pop noise is produced by the transient impact of various operations at the moment of power on or 
power off of audio devices. To suppress pop noise, pay special attention to the following processes.   

Process of Starting Voice Playing 

(1)

 

Power On Sequence

 

Power On

SPI On

(pin PC7/SCSAB

1)

Ramp Up

Ready

SPI On

Enable VDDIO

PBS0[1:0]

11B

Enable SPI Pin

PCS1

0x55

set SAMLS, SACSEN

SPIAC0

0x00

SPIAC1

0x0C

set SPIAEN

SPIAEN

1

Return

 

When starting to read the Flash, setting the PC7/SCSAB pin from 1 to 0 will cause V33 to 
change instantaneously, which will  affect VCC resulting in unstable output. To solve this 
problem, set the PC7/SCSAB pin from 1 to 0 and then initiate the ramp up process. This will 
ensure a stable power supply when playing voices with reduced pop noise.   

(2)

 

Ramp Up 

When powering on, charge the output pins (SP+/SP-) gradually to a level of 1/2 V

DD

, wait for 

a certain time until the power amplifier has a stable output, then output voice to the speaker. By 
following this sequence, pop noise can be effectively suppressed. The  specific  settings  are 
summarised below. 

 

Initial status: 

(PLADH/PLADL)=0000H

DAEN=1

PAEN=0

MUTEB=1

USVC6~USVC0=000_0000

 

 

Increase the value of PLADH/PLADL gradually from 0000H to 8000H 

 

Volume setup: USVC6~USVC0 

=

 target value 

 

MUTEB=0

 

 

Enable the power amplifier 

(PAEN=1)

, wait for a certain time until it has a stable output 

 

Enable the speaker 

(MUTEB=1)

 for voice playing 

Summary of Contents for HT66FV1 0 Series

Page 1: ...principles features and usage of the MCU integrated audio power amplifier Functional Description A power amplifier is the most basic device in an audio system Power amplifiers can amplify a weak input...

Page 2: ...om the on to off state of the two transistors the distortion of Class B is higher IC IC IC t t Output Waveform Load Line Quiescent Point Quiescet Point Vi Input Waveform Crossover Distortion VBE VCE C...

Page 3: ...A MOSFET driver is used for high power voltage and current amplification after which the amplified digital signal is filtered by a low pass filter to restore the analog audio signal Class D Modulator...

Page 4: ...is input to the power amplifier harmonics based on input frequency multiples are generated due to factors such as the amplifier internal circuit or external component non linear distortion The ratio b...

Page 5: ...r will play the corresponding sound The HT66FV1x0 voice playing function block diagram is shown as follows DAEN and PAEN are the DAC and amplifier enable bits respectively which can be cleared to zero...

Page 6: ...2 1 0 Name P_D7 P_D6 P_D5 P_D4 P_D3 P_D2 P_D1 P_D0 R W R W R W R W R W R W R W R W R W POR 0 0 0 0 0 0 0 0 Bit7 0 P_D7 P_D0 Paly data low byte register bit7 bit0 This register is used to store the 16...

Page 7: ...resistor to AUD AUD_IN is optional according to the desired volume control method A 10 F capacitor is connected to the BIAS pin for bias reference voltage stabilisation and filtering Pin Description...

Page 8: ...ribed below 1 When the PAEN PLAC 1 bit is set high the power amplifier is enabled When the DAEN PLAC 0 bit is set high the 16 bit D A converter is enabled 2 When the MUTEB USVC 7 bit is set high the s...

Page 9: ...which will affect VCC resulting in unstable output To solve this problem set the PC7 SCSAB pin from 1 to 0 and then initiate the ramp up process This will ensure a stable power supply when playing voi...

Page 10: ...s time varies with different speakers Ramp up software flow as shown below Ramp Up Voice Playing Register Initialisation PLADL 0 PLADH 0 DAEN 1 PAEN 0 MUTEB 1 USVC6 USVC0 000_0000 16 bit Play Data PLA...

Page 11: ...ble Power Amplifier PAEN 0 PLADH PLADL 8000H PLADH PLADL 8000H 16 bit Play Data PLADH PLADL 1 16 bit Play Data PLADH PLADL 1 Volume Setup USVC6 USVC0 000_0000 16 bit Play Data PLADH PLADL 1 PLADH PLAD...

Page 12: ...d audio power amplifier Demo code settings are as follows fSYS 8MHz 1 Power On Sequence settings using ASM language MAIN_START CALL SPI_ON CALL RAMP_UP 2 SPI On settings using ASM language SPI_ON enab...

Page 13: ...SACSEN _spiac0 0x00 _spiac1 0x0C _spiaen 1 set SPIAEN 6 Ramp Up settings using V3 C language void RAMP_UP void unsigned int j _pladl 0x00 initialise DAC 16 bit data _pladh 0x00 _daen 1 enable 16 bit D...

Page 14: ...A LOOP2 CALL DELAY_10US MOV A 0FFH decrease PLADH PLADL from 8000H to 0000H ADDMA PLADL MOV A 0FFH ADCMA PLADH SZ PLADL JMP LOOP2 SZ PLADH JMP LOOP2 CLR MUTEB disable speaker output CLR DAEN disable 1...

Page 15: ...f Sequence settings using V3 C language RAMP_DOWN SPI_OFF 12 SPI Off settings using V3 C language void SPI_OFF void _spiaen 0x00 clear SPIAEN _spiac1 0x00 clear SAMLS SACSEN _pcs1 0x00 disable SPI pin...

Page 16: ...iable for any damages including but not limited to computer virus system problems or data loss whatsoever arising in using or in connection with the use of this website by any party There may be links...

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