Hitachi Deskstar T7K500, Specifications

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7.9.4 Safe handling .............................................................................................64
7.9.5 Environment ..............................................................................................64
7.9.6 Secondary circuit protection ......................................................................64
7.10. Electromagnetic compatibility.......................................................................... 65
7.10.1 CE Mark ..................................................................................................65
7.10.2 C-TICK mark ...........................................................................................65
7.10.3 BSMI mark ..............................................................................................65
7.10.4 MIC Mark ................................................................................................65
7.11. Packaging.......................................................................................................... 65
7.11.1 Substance restriction requirements ..........................................................65
8.0. General.......................................................................................................................67
8.1. Introduction......................................................................................................... 67
8.2. Terminology ....................................................................................................... 67
8.3. Deviations from standard.................................................................................... 67
9.0. Registers.....................................................................................................................69
9.1. Register set.......................................................................................................... 69
9.2. Alternate Status Register .................................................................................... 70
9.3. Command Register ............................................................................................. 70
9.4. Cylinder High Register ....................................................................................... 70
9.5. Cylinder Low Register........................................................................................ 70
9.6. Data Register ...................................................................................................... 71
9.7. Device Control Register .................................................................................... 71
9.8. Drive Address Register....................................................................................... 72
9.9. Device/Head Register ......................................................................................... 72
9.10. Error Register.................................................................................................... 73
9.11. Features Register .............................................................................................. 73
9.12. Sector Count Register ....................................................................................... 73
9.13. Sector Number Register.................................................................................... 74
9.14. Status Register .................................................................................................. 74
10.0. General operation ...................................................................................................77
10.1. Reset response .................................................................................................. 77
10.2. Register initialization........................................................................................ 78
10.3. Diagnostic and Reset considerations ................................................................ 79
10.4. Sector Addressing Mode................................................................................... 80
10.4.1 Logical CHS addressing mode ................................................................80
10.4.2 LBA addressing mode .............................................................................80
10.5. Power management features ............................................................................. 81
10.5.1 Power mode .............................................................................................81
10.5.2 Power management commands ...............................................................81
10.5.3 Standby timer ...........................................................................................81
10.5.4 Interface capability for power modes ......................................................82
10.6. S.M.A.R.T. Function ........................................................................................ 83
10.6.1 Attributes .................................................................................................83
10.6.2 Attribute values .......................................................................................83
10.6.3 Attribute thresholds .................................................................................83
10.6.4 Threshold exceeded condition .................................................................83