P306/P307 Integrator’s Guide
Chapter 2-Board Overview
Page 16 of 39
Eclipse 20-Pin Header Layout/Pinout
The P307 boards have a 20-pin header. Figure 2-4 shows the Eclipse 20-pin header layout, and
Table 2-3 provides the Eclipse 20-pin header pinout.
Figure 2-4: Eclipse 20-pin header layout
Table 2-3: Eclipse 20-pin header pinout
Pin
Name
Type
Description
1
Antenna Pwr
Power
Antenna power, DC, 15 V max
2
3.3 V
Power
Receiver power supply, 3.3 V
3
USB DEV–
I/O
USB device data -
4
USB DEV+
I/O
USB device data +
5
Reset
Open collector
Reset, open collector, 3.3 V typical, not
required
6
PCRX
Input
Port C serial input, 3.3 V CMOS, idle high
7
PCTX
Output
Port C serial output, 3.3 V CMOS, idle high
8
PDRX
Input
Port D serial input, 3.3 V CMOS, idle high
9
PDTX
Output
Port D serial output, 3.3 V CMOS, idle high
10
GND
Power
Receiver ground
11
PATX
Output
Port A serial output, 3.3 V CMOS, idle high
12
PARX
Input
Port A serial input, 3.3 V CMOS, idle high
13
GND
Power
Receiver ground
14
PBTX
Output
Port B serial output, 3.3 V CMOS, idle high
15
PBRX
Input
Port B serial input, 3.3 V CMOS, idle high
16
GND
Power
Receiver ground
17
Manual Mark
Input
Active low, falling edge, 3.3 V CMOS
18
GND
Power
Receiver ground
19
1 PPS
Output
Active high, rising edge, 3.3 V CMOS
20
Position Valid
Indicator
Output
Status indicator, 3.3 V CMOS, active low
Note: Pins are not 5 V tolerant. The pin voltage range is 0 to 3.3 VDC, unless otherwise noted.
Leave any data or I/O pins that will not be used unconnected.
Summary of Contents for P306
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