SECTION J
CONTROLLER BOARD (A12)
J.1.
Principles of Operation
The Controller board contains the cir-
cuitry for controlling the primary contac-
tors, setting the power level, metering,
overload protection, and status indications.
Practically everything on Sheet 1 of the
Controller schematics has to do with power
control.
Sheet 2 covers metering sample voltages,
overload sensing, overload status, and over-
load counting.
Sheet 3 shows the +/-12 volt regulators, a
power-up reset circuit, and the PA and PDM
Fault sensing circuits.
J.1.1.
Coarse Power Level Control
The power level latching circuitry consists
of U4, U5, and U6. See sheet 1. These are
type D flip flops, any one of which is set by
selecting one of the power levels. Energiz-
ing of one of the power level control inputs
with a logic zero sets the corresponding flip
flop Q output to a high condition.
NOR gates U7, U8, U9, U10, U11, and
U12 reset the other flip flops so that only
one Q output is high at a time. In a transmit-
ter ON mode, all but one of these NOR gates
will have LOW outputs. The one with a
HIGH output is the one associated with the
active flip flop, ie. the power level that has
been selected. During the Automatic Cut-
back function, the NOR gates are put in a
neutral mode (output open) via the tri-state
input. This allows the flip flops to function
in a shift register mode.
Quad transistor packs U34 and U35 are
driven by the flip flop Q outputs. In turn,
these transistors energize the LEDS, and
supply a voltage source for the power level
setting potentiometers and remote status.
A power change or turn on sequence from
remote control is as follows: The input side
of an optical isolator is energized by con-
necting the low side of one of the inputs to
ground (U1 pin 2 for example). The high
side is connected to +12 volts if the Re-
mote/Local switch is in Remote.
The output side of the optical isolator (U1
pin 15 in this example) applies a logic zero
to the tri-state input of NOR gate U7 to put
its output in a neutral condition. At the same
time, the low output from the optical isola-
tor is applied to the preset input of flip flop
U4 (pin 4). This forces the Q output (pin 5)
to a high condition (near +12 volts).
The Q output from the flip flop drives the
base of an emitter follower circuit formed
by U34. For LOW power, U34 pin 3 will be
high (about 11 volts). It provides current for
the power level indicator LED in the LOW
switch, a source voltage for the power level
control pot R54, and provides an output to
the Interface board to be used by the Output
Monitor and remote status lines.
The outputs from the power level setting
potentiometers are brought together into a
summing amplifier, U19. The input of U19
is a virtual ground, and since only one pot
has a voltage source at any given time, the
pots do not interact with each other.
Sections of U19 amplify and sum the
coarse power controls with the fine power
circuit consisting of U38, U14, U15, U16,
U17, and U18. Explanation of the Fine
Power circuit is covered later.
J.1.2.
Contactor Control
When any power level is energized, there
will be current through R91, which is com-
mon to the LED’s of all power levels.
The voltage developed across R91 biases
Q6 to an ON state. This in turn biases Q1
ON, and a high signal (near 12 volts) is sent
to the Interface board where it is used to
drive the circuit which will energize the
start contactor.
At the same time as the start signal is
given, a PDM kill is applied by a circuit
formed by Q4, Q7, and Q8. A PDM kill is
used during step start to prevent the high
voltage supply from being loaded during
the step start sequence.
As the voltage on the primary of the high
voltage transformer comes up from zero, it
quickly reaches a level where Run contactor
(K2) will energize. This is a 200 to 240 volt
contactor with its coil directly across the
primary of the high voltage transformer.
Upon closure of the Run contactor (K2),
the base of Q4 is grounded via the K2
auxiliary contacts. This causes Q4 to shut
off and the PDM Kill LED to extinguish.
Q7 turns ON, thereby shutting Q8 OFF, and
the transmitter power level comes up from
zero.
J.1.3.
Fine Power Control
The Fine Power Control circuit, consist-
ing of U38, U14, U15, U16, U17, and U18
provides for remote and front panel trim-
ming of the power level.
Flip Flop U38 serves the purpose of sum-
ming the output of a pulse generator formed
by a section of U19, de-bouncing the
Raise/Lower switches, and stopping the
up/down counting circuit once the upper or
lower limit is reached.
U14 and U15 are Up/Down counters
which provide a 8 bit digital output which
changes as the Fine Power circuit is oper-
ated. At the extreme low end if its adjust-
ment range, the outputs of U14 and U15 will
all be low (near zero volts). At the upper end
of the Fine Power adjustment range, all
outputs of U14 and U15 will be high (near
12 volts).
U16 and U17 are gates which detect the
upper and lower extremes of the adjustment
range. By detecting an “all zeros” or “all
highs” condition, U16 and U17 provide out-
puts which stop any further pulses from
getting through U13.
U18 is a digital to analog converter which
takes the 8 bit digital output from U14 and
U15, and uses it to vary a dc level to U19
pin 13. The output from U19 on pin 14 is
thus determined by the 8 bit digital word
and a voltage provided by the coarse power
controls through another section U19.
J.1.4.
Metering
Voltage samples representing Power Sup-
ply Voltage, Power Supply Current, PA
Voltage, RF Drive, and the VSWR Detector
enter the U20 and U21 on the Controller.
See sheet 2. These sample voltages are am-
plified and go to the appropriate meters and
overload circuitry.
J.1.5.
Overload Circuitry
U22 is the overload comparator which
determines if a parameter is out of tolerance
based on input from the various voltage
samples and the threshold settings deter-
mined by the overload pots.
If a parameter is out of tolerance, U22
gives a logic high output. This initiates the
protective action and clocks the corre-
sponding flip flop (U23 and U24) which in
turn light the corresponding LED indicator.
In most cases, this protective action is a
PDM Interrupt.
In the case of the Supply Voltage overload
or a sustained Supply Current overload, a
contactor OFF command is given via one
section of U37.
The other overload functions result in only
momentary breaks in the carrier (a result of
a PDM Interrupt), and can automatically
step the power output down if needed to
maintain an on air status.
U25 and U26 comprise the overload timer.
This sets the minimum carrier interrupt time
for about 6 to 8 milliseconds in the event of
an overload. When an overload compara-
Rev.AE: 03-05-2002
888-2314-001
J-1
WARNING: Disconnect primary power prior to servicing.
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