Silicon Image
Confidential
for
Anam
Internal Use Only
SiI9573 and SiI9575 Port Processor
Advance
Data Sheet
Silicon Image, Inc.
2
© 2010-2011 Silicon Image, Inc. All rights reserved.
SiI-DS-1089-0.71
CONFIDENTIAL
Pin Diagram
Pin diagram is subject to change.
Figure 2
shows the pin assignments of the SiI957n port processor. The
Target Pin
Descriptions section describing the pin
functions begins on page 16. The package is a 20 mm x 20 mm x 0.4 mm 176-pin TQFP with an ePad, which
must
be
connected to ground.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
99
98
97
96
95
94
93
92
91
90
89
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
D15
D16
D17
D18
D19
DE
VSYNC
HSYNC
ID
CK
R0XC-
R0XC+
R0X0-
R0X0+
R0X1-
R0X1+
R0X2-
R0X2+
R1XC-
R1XC+
R1X0-
R1X0+
R1X1-
R1X1+
R1X2-
R1X2+
R2XC-
R2XC+
R2X0-
R2X0+
R2X1-
DSCL3
CBUS_HPD3
R3PWR5V
DSCL4
DSCL5
SBVCC5V
VCC33OUT
TX_HPD0
TXDSDA0
TXDSCL0
TXDSDA1
TXDSCL1
RSVDL
SS/GPIO2
SCLK/GPIO3
SD0/GPIO4
SDI/GPIO5
XTALOUT
XTALIN
XTALVCC33
XTALGND
APLL12
Top View
Si
I
957
n
33
34
35
36
37
38
39
40
41
42
43
44
R2X1+
R2X2-
R2X2+
R4X
0-
R4X
0
+
AVDD33
R3XC-
R3XC+
R3X0-
R3X0+
R4X
C-
R4X
C+
77
78
79
80
81
82
83
84
85
86
87
88
96
132
131
130
129
128
127
126
125
124
123
122
121
AVDD33
T
1
X
2
+
T
1
X
2
-
T
1
X
1
+
T
1
X
1
-
T
1
X
0
+
T
1
X
0
-
T
1
X
C+
T
1
X
C-
T
P
V
DD
12
CVCC12
T
DV
DD1
2
144 143 142 141 140 139 138 137 136 135 134 133
100
CBUS_HPD4
R4PWR5V
CBUS_HPD5
TX_HPD1
SD0_0/DL0
SD0_1/DR1/GPIO6
SD0_3/DR2/GPIO8
SD0_2/DL1/GPIO7
WS0_OUT/DR0
T
O
X
2+
T
O
X
2-
T
O
X
1+
T
O
X
1-
T
O
X
0+
T
O
X
0-
T
O
X
C
+
T
O
X
C
-
A
RC0
A
RC1
MCLK
SCK0/DDCK
SPDIF0_OUT/DL2
WS0_IN/GPIO11
S
D0_
IN/
S
P
D
IF
O
_I
N
S
CK
1
_I
N
/S
C
K
1
_
O
U
T
W
S
1
_
IN
/W
S
1_O
UT
S
D1_
IN/
S
D1_O
UT/
S
P
DI
F
1_I
N
/S
P
D
IF
1_O
UT
MUTEOUT/GPIO9
D14
D1
3
D1
2
D1
1
D1
0
D9
D1
D2
D3
D4
D5
D6
D7
D0
D8
R3X
2-
R3X
2+
R3X1-
R3X1+
DS
DA
0
DS
DA
1
DS
DA
2
DS
DA
3
DSDA4
DSDA5
DS
DA
6
(V
G
A
)
DS
CL
2
DS
CL
0
DS
CL
1
DS
CL6(V
G
A
)
R2P
W
R5V
R5PWR5V
R1P
W
R5V
R0P
W
R5V
CB
US
_
HP
D
0
CB
US
_
HP
D
1
CB
US
_
HP
D
2
CS
CL
CS
DA
RE
S
E
T
#
T
P
W
R_C
I2CA
IN
T
CE
C_A
0/
W
A
K
E
UP
CE
C_A
1
LP
S
V
C
C33
MHL_CD0/GPIO0
MHL_CD1/GPIO1
T
DV
DD1
2
T
P
V
DD
12
CVCC12
CV
CC1
2
CV
CC1
2
CV
CC12
R4X
1-
R4X
1+
R4X
2-
R4X
2+
R5X
0-
R5X
0+
R5X
C+
R5X
1-
R5X
1+
R5X
2-
R5X
2+
R5X
C-
A
V
DD33
IOVCC33
IO
V
CC
33
AVDD12
AVDD12
A
V
DD1
2
SCK0_IN/GPIO10
Figure 2. Pin Diagram (Top View)
Harman Kardon
AVR 171 Service Manual
Page 144 of 174
Summary of Contents for AVR 171/230
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