Xenaro – GDP 51…, GDP 6150
Platinenabbildungen und Schaltpläne / Layout of PCBs and Circuit Diagrams
GRUNDIG Service
3 - 21
PRODUCTION (FLASH)
R85
JUMPER SETTING
SW DEVELOPMENT (SRAM)
R86
POWER-UP CONFIGURATION RESISTORS
OPTIONAL
TEST FEATURE
Setting hardware to specify power up strategy to software.
AD14] --> cfg_PdnMd PWR_CFG[10] R/W
cfg_PdnMd = ~AD[14]
0 = Power down option 1*
1 = Power down option 2
Setting: allows selection of 16/32 bit mode for ROM.
Pulldown resistor on AD4 is not assembled ==> 0 = 16-bits,
Pulldown resistor on AD4 is assembled ==> 1 = 32-bits*
SOCKET MODEM
XIO6
SRAMCS-
XIO3
XSPARE10
XIO10
XSPARE7
SRST-
PCS0-
XSPARE12
PWE2-
LHLDA
XIO8
X5.0V
LHLD
XIO7
XIO5
XSPARE8
PWE3-
LHLDA
SCLKR
XIO11
LA2
PWE1-
XIO1
XIO4
LHLD
FLASHCS0-
XSPARE5
ACK-
ALE
PWE3-
PWE2-
PWE1-
SCLKR
ALE
ACK-
XSPARE6
PCS0-
PWE0-
XIO9
LDRST
RD-
RD-
PWE0-
XIO[11:1]
AD12
AD14
AD17
AD5
AD9
AD20
AD22
AD29
AD26
AD8
AD14
AD3
AD28
AD10
AD6
AD21
AD24
AD2
AD19
AD11
AD27
AD0
AD23
AD18
AD30
AD31
AD7
AD4
AD13
AD15
AD4
AD1
AD25
AD16
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
XIO10
MXIO10
MPWE0
-
MRD-
MMODEMINT
MSRSTB-
MXIO10
MAD4
MLA1
MAD2
MAD1
MAD7
MAD5
MAD0
MLA0
MLA2
MLA2
MLA0
MAD0
MAD6
MLA1
MAD1
MAD3
MAD5
MAD6
MAD3
MAD7
MAD4
MAD2
LA[3:0]
LA0
LA3
LA1
LA2
LA0
LA1
LA3
LA2
LA1
LA0
ACK-
P1, P5
SRST-
P1, P5, P2
PCS0-
P1
LHLDA
P1
PWE3-
P1
ALE
P1, P5
SCLKR
P1
FLASHCS0-
P5
XIO[11:1] P1
PWE1-
P1
LA[3:0]
P1, P5
AD[31:0]
P1, P5
RD-
P1, P5
PWE2-
P1
PWE0-
P1, P5
LHLD
P1
RSTP-FPGA-
P1
SRSTB-
P1
RD-
P1, P5
MODEMINT
P1
SRSTB-
P1
PWE0-
P1, P5
+5.0V
+5.0V
+5.0V
+3.3V
TS15
R80
0R MODEM N/A
R75
3.3K N/A
TS16
RP3
33R N/A
1
8
7
6
5
2
3
4
RP5
33R N/A
1
8
7
6
5
2
3
4
R83
330R (Test)
R86
0R
TS19
R85
0R N/A
TS18
R74
10K (Dev)
J13
CO
N26A
-
M
O
DE
M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
SW1
SW-SPST-MOM-2P (Test)
" RESET "
2
1
RP7
33R N/A
1
8
7
6
5
2
3
4
R73
3.3K N/A
R82
0R MODEM N/A
TS14
RP2
33R N/A
1
8
7
6
5
2
3
4
1
2
LD1
" RESET "
YELLOW
LED-SMD1206-YELLOW (Test)
P/N: 179030-4
100 PIN, 0.8MM PITCH
MANUFACTURER: AMP
CONN 50X2 BOARD TO BOARD 0.8MM AMP 179030-4 (Dev)
THIS CONNECTOR (XBUS) IS USED FOR SW
DEVELOPMENT, FLASH PROGRAMMING AND
CONNECTING WITH OTHER HW DEVELOPMENT
PLATFORMS AND LOGIC ANALYZER.
J12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
+5V
+5V
+5V
+5V
+3.3V
+3.3V
+3.3V
+3.3V
SRST-
SPARE1
RSTP-
SPARE2
GND
GND
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
GND
AD23
PWE3-
AD22
GND
AD21
AD20
AD19
AD18
AD17
GND
AD16
PWE2-
AD15
GND
AD14
SCLK
AD13
GND
AD12
ACK-
AD11
GND
AD10
AD9
AD8
GND
AD7
PWE1-
AD6
GND
AD5
AD4
AD3
AD2
AD1
AD0
GND
GND
PWE0-
ALE
GND
GND
LA0
LA1
LA2
LA3
GND
GND
RD-
LHLDA
GND
GND
LHLD
PCS0-
GND
GND
SRAMCS-
XIO1
GND
GND
XIO3
XIO4
GND
GND
XIO5
XIO6
GND
GND
XIO7
XIO8
GND
GND
XIO9
XIO10
GND
GND
XIO11
TS17
P6
Digital-Platte / Board – Interface
(P6)
Reference
IC Block Diagrams .........3-4
Oscillograms...................3-43
Analog Board GDP51 ....3-23
Analog Board GDP61
– AC3 .............................3-27
– Audio/Video.................3-29
Digital Board
– P1 ...............................3-15
– P2 ...............................3-17
– P3 ...............................3-19
– P4 ...............................3-19
– P5 ...............................3-20
– P6 ...............................3-21
Drive Board ....................3-37
Keyboard Control ...........3-33
Power Supply .................3-11
