Hardware concept of ZXmore
The following chapters explain the architecture of ZXmore seen for different hardware aspects.
The hardware is compatible to ZX80 and ZX81 but not identical. The following paragraphs
show the differences in concept.
Memory concept:
The ZX81 and ZX80 are based on mirrored RAM and ROM.
The typical segmentation of a system with 16kB RAM:
$0000-$1FFF ( 8kB ROM)
$2000-$3FFF ( 8kB ROM mirrored from $0000-$1FFF)
$4000-$7FFF (16kB RAM)
$8000-$BFFF (16kB mirrored ROM)
$C000-$FFFF (16kB mirrored RAM)
It is possible to switch off this mirrored sections but the mirror at memory address $C000-
$FFFF is required for the video display system.
The ZXmore in comparison can do the video display without mirrored memory areas. You will
find more information in the section video display system. ZXmore has 64kB ROM and 64kB
RAM which addresses overlapped partly. There is a border between ROM and RAM which can
be moved in steps of 4kB in any direction.
The memory layout can be defined different for any of 7 instances. It is possible to move the
border on request to access some hidden memory areas to place additional drivers in ROM
area which use only sparse RAM and can release RAM areas after use. On the other hand it is
possible to use additional RAM for storing temporary data when hide ROM areas.
A typical memory layout could be:
$0000-$1FFF = 8kB ROM
$2000-$3FFF = 8kB additional ROM/drivers
$4000-$FFFF = 48kB RAM
or
$0000-$1FFF = 8kB ROM
$2000-$FFFF = 56kB RAM
or in A15 compatibility mode (see video display system)
$0000-$1FFF = 8kB ROM
$2000-$3FFF = 8kB ROM or RAM on request
$4000-$BFFF = 32kB RAM
$C000-$FFFF = 16kB mirrored RAM (from $4000-$7FFF)
More details can be found in section „Hints for programming the latches“.
V1.9 - 06/2016
ZXmore & ZXmaster – user manual
page 23 from 29
ROM 16kB
RAM 64kB
hidden ROM
hidden RAM
