BIOS Setup
- 105 -
Parameter
Description
Target Static Lane Select
Upper 32 bits
This item is configurable when
Target Static Lane Control
is set to
Enabled
.
Target Static Lane Select
Lower 32 bits
This item is configurable when
Target Static Lane Control
is set to
Enabled
.
Target Static Lane Select
ECC
This item is configurable when
Target Static Lane Control
is set to
Enabled
.
Target Static Lane Value
This item is configurable when
Target Static Lane Control
is set to
Enabled
.
Worst Case Margin
Granularity
Configures Worst Case Margin Granularity.
Options available: Per Chip Select, Per Nibble.
Default setting is
Per Chip Select.
Read Voltage Sweep Step
Size
Configures the step size for read Data Eye voltage sweep.
Options available: 1, 2, 4. Default setting is
1
.
Read Timing Sweep Step
Size
Configures the step size for read Data Eye timing sweep.
Options available: 1, 2, 4. Default setting is
1
.
Write Voltage Sweep Step
Size
Configures the step size for write Data Eye voltage sweep.
Options available: 1, 2, 4. Default setting is
1
.
Write Timing Sweep Step
Size
Configures the step size for write Data Eye timing sweep.
Options available: 1, 2, 4. Default setting is
1
.
Silent Execution
Execute MBIST Data Eye silently without ABL log output.
Options available: Enabled, Disabled. Default setting is
Disabled
.
Summary of Contents for R263-Z33
Page 1: ...R263 Z33 AAF1 AMD EPYC 9004 GPU Server System 2U UP 12 Bay NVMe SATA SAS User Manual Rev 100 ...
Page 13: ...Hardware Installation 13 1 3 System Block Diagram ...
Page 41: ...System Hardware Installation 41 21 A B D C B B A A C C D F E D E E F ...
Page 53: ...BIOS Setup 53 When Boot Mode Select is set to Legacy in the Boot Boot Mode Select section ...
Page 64: ...BIOS Setup 64 5 2 7 PCI Subsystem Settings ...
Page 77: ...BIOS Setup 77 5 2 17 Intel R I210 Gigabit Network Connection ...
Page 83: ...BIOS Setup 83 5 3 1 CPU Common Options ...
Page 117: ...BIOS Setup 117 5 3 4 NBIO Common Options ...