GE VMIVME-2533-010, Hardware Reference Manual

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33
Data Loopback
3
Data Loopback
A data loopback operation, used for loopback testing, is initiated when the CPU
executes an instruction that sends a board address that causes the selection of the
board. When the CPU executes an instruction to read data, VMEbus control signals
cause the board to place a data input word on the VMEbus for transfer to the
computer. The format of the input data and the board address are the same as the
output data and is shown in Table 3-1 below.
Table 3-1 Address Register Bit Definitions
HEX
ADDRESS
A3 A2 A1 A0
BINARY
ADDRESS
A15 to A4
IDB 15 IDB 14 IDB 13 IDB 12 IDB 11 IDB 10 IDB 9 IDB 8
X X X 0 0
X X 0 X
X
1 X
X X
X X
X X 0 1
X X 1 1
IDB 7 IDB 6 IDB 5 IDB 4 IDB 3 IDB 2 IDB 1 IDB 0
I/O 23 I/O 22 I/O 21 I/O 20 I/O 19 I/O 18 I/O 17 I/O 16
IDB 15 IDB 14 IDB 13 IDB 12 IDB 11 IDB 10 IDB 9 IDB 8
IDB 7 IDB 6 IDB 5 IDB 4 IDB 3 IDB 2 IDB 1 IDB 0
I/O 15 I/O 14 I/O 13 I/O 12 I/O 11 I/O 10 I/O 9 I/O 8
I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 I/O 2 I/O 1 I/O 0
0
Y Y Y 1
IDB 7 IDB 6 IDB 5 IDB 4 IDB 3 IDB 2 IDB 1 IDB 0
Y Y
X
Y
X
X
X
DATA PORT 0 (UPPER BYTE)
DATA PORT 1 (MIDDLE UPPER BYTE)
DATA PORT 2 (MIDDLE LOWER BYTE)
DATA PORT 3 (LOWER BYTE)
I/O 31 I/O 30 I/O 29 I/O 28 I/O 27 I/O 26 I/O 25 I/O 24
CONTROL STATUS REGISTER
USER-DEFINED
TM1 TM2 FAIL
NOT
USED
Set to a "zero" to disable output drivers. Set to a "one" to enable output drivers.
Set to a "zero" to enable internal registers. Set to a "one" to disable internal loopback registers.
Fail mode LED bit. Fail LED is ON if bit is "zero", OFF if "one".
*0=Active State
TM1*
TM2*
FAIL*
CSR BIT DEFINITIONS
X is for the DATA address select jumpers JD and JF
Y is for the CSR address select jumpers JC and JE
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
0 0 0 0 0 0 0 1
BD ID REGISTER
Y Y Y Y Y Y
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