GE UR series, Instruction Manual

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GE Multilin L60 Line Phase Comparison System 5-95
5 SETTINGS 5.4 FLEXLOGIC™
5
5.4.2 FLEXLOGIC™ RULES
When forming a FlexLogic™ equation, the sequence in the linear array of parameters must follow these general rules:
1. Operands must precede the operator which uses the operands as inputs.
2. Operators have only one output. The output of an operator must be used to create a virtual output if it is to be used as
an input to two or more operators.
3. Assigning the output of an operator to a virtual output terminates the equation.
4. A timer operator (for example, "TIMER 1") or virtual output assignment (for example, " = Virt Op 1") may only be used
once. If this rule is broken, a syntax error will be declared.
5.4.3 FLEXLOGIC™ EVALUATION
Each equation is evaluated in the order in which the parameters have been entered.
FlexLogic™ provides latches which by definition have a memory action, remaining in the set state after the
set input has been asserted. However, they are volatile; that is, they reset on the re-application of control
power.
When making changes to settings, all FlexLogic™ equations are re-compiled whenever any new setting
value is entered, so all latches are automatically reset. If it is necessary to re-initialize FlexLogic™ during
testing, for example, it is suggested to power the unit down and then back up.
5.4.4 FLEXLOGIC™ EXAMPLE
This section provides an example of implementing logic for a typical application. The sequence of the steps is quite impor-
tant as it should minimize the work necessary to develop the relay settings. Note that the example presented in the figure
below is intended to demonstrate the procedure, not to solve a specific application situation.
In the example below, it is assumed that logic has already been programmed to produce virtual outputs 1 and 2, and is only
a part of the full set of equations used. When using FlexLogic™, it is important to make a note of each virtual output used –
a virtual output designation (1 to 96) can only be properly assigned once.
Figure 5–34: EXAMPLE LOGIC SCHEME
1. Inspect the example logic diagram to determine if the required logic can be implemented with the FlexLogic™ opera-
tors. If this is not possible, the logic must be altered until this condition is satisfied. Once this is done, count the inputs
to each gate to verify that the number of inputs does not exceed the FlexLogic™ limits, which is unlikely but possible. If
the number of inputs is too high, subdivide the inputs into multiple gates to produce an equivalent. For example, if 25
inputs to an AND gate are required, connect Inputs 1 through 16 to AND(16), 17 through 25 to AND(9), and the outputs
from these two gates to AND(2).
Inspect each operator between the initial operands and final virtual outputs to determine if the output from the operator
is used as an input to more than one following operator. If so, the operator output must be assigned as a virtual output.
NOTE
LATCH
CONTACT INPUT H1c
State=Closed
XOR
AND
Reset
Set
VIRTUAL OUTPUT 2
State=ON
VIRTUAL INPUT 1
State=ON
DIGITAL ELEMENT 1
State=Pickup
DIGITAL ELEMENT 2
State=Operated
OR #2
Operate Output
Relay H1
OR #1
(800 ms)
Timer 1
Time Delay
on Pickup
(200 ms)
Timer 2
Time Delay
on Dropout
VIRTUAL OUTPUT 1
State=ON
827025A2.vsd