GE BRIVO MR355, Service Training, Page: 153 / 227

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8. Clock Interface
The Mega Switch receives 80MHz Master Clock from Exciter. The clock signal is band pass filtered to
reduce the noise from the system, and routed to a LVPECL buffer to convert sine wave to LVPECL
signal. The converted clock signal is transmitted to the RRx module through TNS interface connector.
9. TNS (Transient Noise Suppressor)
The Mega Switch detects the possible occurrence of a significant transient noise event using a BNC
connected independent loop antenna. The RF signal from the antenna is bandwidth limited and
applied to a logarithmic (dB power to V) amplifier device, the output of which is compared to a
threshold provided by the RRx Module. 8bit D/A converter is used to generate the threshold level
voltage in the RRx module and the threshold level can be set to a value in the D/A Converter ’ s output
range. If the threshold is exceeded, a transient detect flag will be output to RRX.
10. Power Interface
a) Power Connector
The Mega Switch receives the supply voltage from the external power supply. The Mega Switch
provides a stacked SubD 37 pin female connector to receive 6V85_A, 6V85_D_RRx, N6V85_A,
5V05_A_RRx, 5V05V_D_RRx, 3V16_D_RRx and Power Good (PG) Signals. The pin assignment of the
power connector is the same to each other to for failsafe. The Mega Switch doesn ’ t use all of these
supply voltages mentioned above, just uses 6V85_A and N6V85_A. 6V85_A is regulated to 6V_A and
5V_A, and 5V_A is regulated to 3V3_D on the board, respectively. The received supply voltages are
distributed to the RRx Module and / or the MNS upconverter.
b) Power Supply Supervise
The Mega Switch provides the supervise circuit for the 6V regulator. The supervise circuit provides
the power good (PG) signal. Also, the Mega Switch has an interface to receive the PG signal from the
Regulator Box, which is the power supply board for the Mega Switch and RRx. The power good
signals are High in normal operation, but become Low when the regulated voltages become out of
the specified range. These two PG signals are fed into CPLD on the Mega Switch, and the CPLD
generates a signal which is AND logic output of these two PG signals. This signal from the CPLD is
passed to the RRx Module as the “ MegaSW_PG ” signal.