Fujitsu MAW3073 SERIES, Specifications

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1-78 C141-C011
Figure 1.34 DT DATA IN phase training pattern
(b) DT DATA OUT phase training pattern
The TARG requests a training pattern on a DT DATA OUT phase by asserting the SEL signal a
minimum of two system deskew delays before asserting the REQ signal. The TARG begins its
training sequence by transmitting the following training pattern:
1) if precompensation is enabled then set the drivers to the strong driver state;
2) simultaneously assert REQ and P_CRCA signals;
3) wait the equivalent of 32 transfer periods (e.g., 200 ns at fast-160);
4) simultaneously negate REQ and P_CRCA signals;
5) wait 32 the equivalent of transfer periods (e.g., 200 ns at fast-160);
6) set precompensation to negotiated state;
7) negate SEL signal;
8) simultaneously assert and negate REQ and P_CRCA signals at the negotiated transfer
period 32 times, (e.g., (2 x 6,25) x 32 = 400 ns at fast-160);
9) negate REQ and P_CRCA for at least the equivalent of 16 transfer periods (e.g., 100 ns at
fast-160); and
10) the TARG shall begin asserting and negating REQ to indicate to the INIT valid data may
be sent. The number of REQ assertions shall not exceed the negotiated REQ/ACK offset.