Fujitsu CPUMEMR D3131 Technical Manual Download Page 55

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D3081, D3131, D3082 (RX900 S1)

Technical Manual

Features

3.7.1.4

I/O board

Figure 16

shows the onboard connector on the I/O board.

Figure 16: Onboard connector on the I/0 board

3.7.2

Onboard DIP switch

Figure 17

shows the position of the DIP switch where the DIP switch settings

are named in

table 17

Default setting: Switches 1 to 4 are set to Off.

Pos.

Connector

1x USB connector

Summary of Contents for CPUMEMR D3131

Page 1: ...Technical Manual English Baseboard D3081 CPUMEMR D3131 PCIR D3082 for PRIMERGY RX900 S1 Technical Manual Edition August 2010 ...

Page 2: ...pyright and Trademarks Copyright 2010 Fujitsu Technology Solutions GmbH All rights reserved Delivery subject to availability right of technical modifications reserved All hardware and software names used are trademarks of their respective manufacturers The contents of this manual may be revised without prior notice Fujitsu assumes no liability for damages to third party copyrights or other rights ...

Page 3: ...ies and in the mouse and keyboard are limited life components Use of these components beyond their operating life may result in electrolyte leakage or depletion potentially causing emission of foul odor or smoke As a guideline in a normal office environment 25 C operating life is not expected to be reached within the maintenance support period 5 years However operating life may be reached more qui...

Page 4: ...rsonal Computer issued by JEITA the Japan Electronics and Information Technology Industries Association Technology controlled by the Foreign Exchange and Foreign Trade Control Law of Japan Documents produced by Fujitsu may contain technology controlled by the Foreign Exchange and Foreign Trade Control Law of Japan Documents which contain such technology should not be exported from Japan or transfe...

Page 5: ...al Manual Only for the Japanese market I Although described in this manual some sections do not apply to the Japanese market These options and routines include USB Flash Module UFM CSS Customer Self Service Replacing the lithium battery ...

Page 6: ...Technical Manual D3081 D3131 D3082 RX900 S1 ...

Page 7: ...3 2 1 2 DIMM slot population rules for mixed DIMM RANK 25 3 2 1 3 QPI topology 27 3 2 2 Memory configuration modes 30 3 2 2 1 Memory mirroring 30 3 2 2 2 Hemisphere mode 33 3 2 2 3 Memory interleaving 34 3 2 3 Memory board configuration table 34 3 3 PCIe slots 36 3 3 1 PCI interrupt assignment 37 3 3 2 PCIe slot to CPUMEMR assignment 37 3 3 3 Expansion card configuration table 40 3 4 I O space 42 ...

Page 8: ...nnectors and indicators 50 3 7 1 1 Baseboard D3081 50 3 7 1 2 CPU Memory Riser CPUMEMR D3131 53 3 7 1 3 PCI Riser PCIR D3082 54 3 7 1 4 I O board 55 3 7 2 Onboard DIP switch 55 3 7 3 External connectors and indicators 57 3 7 3 1 Baseboard D3081 57 3 7 3 2 I O board 61 4 Replacing the lithium battery 63 ...

Page 9: ...BIOS Setup Utility for RX900 S1 manual I PRIMERGY manuals are available in PDF format on the ServerView Suite DVD 2 The ServerView Suite DVD 2 is part of the ServerView Suite supplied with every server PRIMERGY Abbreviations and Glossary can also be found on the ServerView Suite DVD 2 Notational conventions The following notational conventions are used in this manual Text in italics indicates comm...

Page 10: ...10 Technical Manual D3081 D3131 D3082 RX900 S1 Introduction ...

Page 11: ...qualified staff Any failure to observe the guidelines in this manual and any unauthorized openings and improper repairs could expose the user to risks electric shock fire hazards and could also damage the equipment Please note that any unauthorized openings of the device will result in the invalidation of the warranty and exclusion from all liability Transport the device only in the antistatic ori...

Page 12: ... ISO IEC 11801 standard respectively The minimum requirement is a Category 5 shielded cable for 10 100 Ethernet or Category 5e for Gigabit Ethernet Never connect or disconnect data transmission lines during a storm risk of lightning hazard Batteries V CAUTION Incorrect replacement of batteries may lead to a risk of explosion The batteries may only be replaced with identical batteries or with a typ...

Page 13: ... must always discharge static build up e g by touching a grounded object before working with such components Any devices or tools that are used must be free of electrostatic charge Wear a suitable grounding cable that connects you to the external chassis of the system unit Always hold components with ESDs at the edges or at the points marked green touch points Do not touch any connectors or conduc...

Page 14: ...any other components for example EMI spring contacts Be careful with the locking mechanisms catches centring pins etc when you replace the system board or components on it for example memory modules or processors Never use sharp objects screw drivers for leverage Do not damage or modify internal cables or devices Doing so may cause a device failure fire or electric shock Do not touch the circuitry...

Page 15: ...imeserver fujitsu com primergy concept for the Japanese market Energy saving information Devices that do not need to be constantly switched on should be switched off until they are needed as well as during long breaks and after completion of work Packaging information This packaging information doesn t apply to the Japanese market Do not throw away the packaging You may need it later for transport...

Page 16: ...ulations Details regarding the return and recycling of devices and consumables within Europe can also be found in the Returning used devices manual via your local Fujitsu branch or from our recycling center in Paderborn Fujitsu Technology Solutions Recycling Center D 33106 Paderborn Tel 49 5251 8 18010 Fax 49 5251 8 333 18010 The device must not be disposed of with domestic waste This device is la...

Page 17: ...L3 cache Nehalem EX Main memory Up to 128 slots for DDR3 memory modules 1333 MHz with 2 GB 4 GB 8 GB and 16 GB capacity 16 slots per CPUMEMR 4 SMI links per CPU and up to 4 DDR3 DIMM memory modules per SMI link memory modules connected to CPU via memory buffer named Millbrook Intel Scalable Memory Interconnect SMI link connects CPU and Millbrook Maximum configuration 2 TB memory with availability ...

Page 18: ...LAN controller Niantec Internal connectors 1x SATA connector 1x USB 2 0 connector 1x Trusted Platform Module TPM 1x USB Flash Module UFM External connectors Front side 1x video connector 3x USB 2 0 connectors Rear side 2x 10 GB SFP System LAN connectors 5x 1 GB 1000Base T System LAN connectors 1x 1 GB 1000Base T Shared LAN connector 1x 100 MB 100Base TX Management LAN connector I O board 1x serial...

Page 19: ...out PHP capability Server management controller iRMC S2 The following features are integrated into iRMC S2 Server class Super I O SIO Remote KVMS Baseboard Management Controller BMC including the following functionality 250MHz 32 bit ARM9 processor IPMI 2 0 6x I2C SMBus Two 10 100 Ethernet controllers with RMII support LPC ROM interface SPI Flash interface USB Device One Serial Port Three UART int...

Page 20: ...ASE SX LX optical fiber and gigabit backplane applications SGMII for external PHY or SFP module Management of MAC and PHY Ethernet layer functions Management of PCI Express packet traffic across its transaction link and physical logical layers External SPI 4 wire serial interface to Flash EEPROM devices up to 8 MB memory NI SI SMBus interface to BMC Wake on LAN SR IOV for virtulization on Intel NI...

Page 21: ...This system board supports the CSS functionality You will find a description of CSS functionality in the maintenance manual of your server USB Flash Module The baseboard can be equipped with a USB Flash Module UFM The module can be used as optional memory for software e g VMware or as a software dongle TPM The baseboard can be equipped with a Trusted Platform Module TPM This module enables program...

Page 22: ...itable for 2 GB 4 GB 8 GB and 16 GB DDR3 DIMM modules with 1333 MHz Thus the system supports a maximum memory configuration of 2 TB with availability of 16 GB DIMM modules ECC with memory scrubbing and the single device data correction SDDC function are standard There is no support for non ECC DIMMs Basically the memory modules of an individual CPUMEMR are assigned to the processor installed on th...

Page 23: ...igit 1 or 2 Sequence number within the same DDR3 channel Second digit A to H DDR3 channel number on an individual CPUMEMR Example DIMM 1A DIMM 0 channel 0 DIMM 1B DIMM 0 channel 0 DIMM 2A DIMM 1 channel 0 DIMM 2B DIMM 1 channel 0 Table 2 shows the relation between the DIMM slot number the Millbrook identifier the DDR channel number and the DIMM memory module number within the same DDR channel DIMM...

Page 24: ...pulation order for an individual CPUMEMR and figure 2 maps the population order to the location of the DIMM slots on the CPUMEMR 2D A 1 1 1C A 0 0 2C A 0 1 2A B 0 1 1A B 0 0 2B B 1 1 1B B 1 0 Population order DIMM position 1 1B 1D 1F 1H 2 1A 1C 1E 1G 3 2B 2D 2F 2H 4 2A 2C 2E 2G Table 3 DIMM memory module population order for an individual CPUMEMR DIMM slot number Millbrook identifier DDR channel n...

Page 25: ... for populating the two slots associated with the same DDR3 channel are The slot with the lower sequence number is populated first 1RANK and 2RANK DIMM memory modules can be inserted in both slots 4RANK DIMM memory modules must be installed in the slot with the lower sequence number or in both slots B 1C 1D 1E 1F 1G 1H 1A 1B B 2C 2D 2E 2F 2G 2H 2A 2B A B C D C I C I C I C I C J C J C J C J C K C L...

Page 26: ...gurations with mixed DIMM RANK DIMM x 2 DIMM x 1 4 Rank 4 Rank 2 Rank 4 Rank 1 Rank 4 Rank not installed 4 Rank 2 Rank 2 Rank 1 Rank 2 Rank not installed 2 Rank 2 Rank 1 Rank 1 Rank 1 Rank not installed 1 Rank not installed not installed Table 4 Supported DIMM configurations with mixed DIMM RANK ...

Page 27: ...r 8 CPUMEMRs and each CPUMEMR includes one CPU If one of the CPUs is removed the system uses all of the remaining CPUs that form a consistent QPI topology If removing one CPU would result in an unsupported configuration the system uses the next supported configuration and CPUs not included in this configuration are set to disabled As soon as the removed CPU has been reinstalled the system enables ...

Page 28: ...as been removed Configurations with one to three CPUs are not to be understood as minimum configurations They may occur due to the removal of CPUMEMRs Conf Total number of CPUs CPU number Transition table of removed CPU and next conf 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 C1 1 1 x C1 2 1 x C1 2 C1 1 C2 2 x x C1 2 C1 1 C3 3 x x x C1 2 C1 1 C2 C4 4 x x x x C1 2 C1 1 C2 C3 C6 6 x x x x x x C1 2 C1 1 C2 C4 C...

Page 29: ...OH 2 IOH 3 IOH 4 0 1 0 1 0 1 0 1 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 CPU 8 CPU 1 CPU 4 CPU 2 CPU 3 IOH 1 IOH 2 0 1 0 1 1 2 3 0 2 3 0 1 3 0 1 2 3 0 CPU 1 CPU 2 CPU 3 IOH 1 0 1 1 2 3 0 1 3 0 1 2 3 0 2 2 C8 C6 C4 C3 CPU 1 CPU 2 IOH 1 0 1 1 2 3 0 1 2 3 0 C2 CPU 2 IOH 1 0 1 1 2 3 0 C1 2 CPU 1 IOH 1 0 1 1 2 3 0 C1 1 CPU 4 empty CPU 3 empty CPU 3 empty CPU 3 empty CPU 3 empty ...

Page 30: ...mode is set by the system and depends on the CPUMEMR configuration Intra CPU memory mirroring for a 4 CPUMEMR configuration Inter CPU memory mirroring for 6 and 8 CPUMEMR configurations In mirroring mode the size of the memory modules must be the same within the following groups of DIMM slots see figure 5 DIMM 1B 1D 1F 1H DIMM 1A 1C 1E 1G DIMM 2B 2D 2F 2H DIMM 2A 2C 2E 2G Figure 5 Grouping of DIMM...

Page 31: ...dules 1B to 1D light grey color are mapped to the memory modules 1F to 1H green color Figure 6 Memory mirroring in a 4 CPUMEMR configuration Inter CPU memory mirroring for 6 and 8 CPUMEMR configurations In a 6 or 8 CPUMEMR configuration memory mirroring is configured between pairs of CPUMEMRs Figure 7 shows the CPUMEMR mirroring pairs 1 2 3 4 5 6 7 8 where each pair consists of a green and a light...

Page 32: ...terruption If failed or disabled DIMM memory modules are detected the impact on the mirroring configuration is 1 A group of DIMM memory modules is deactivated 4 CPU configuration 2 DIMM memory modules 6 or 8 CPU configuration 4 DIMM memory modules 2 If the active DIMM memory modules do not form a valid mirroring configuration due to lacking mirroring pairs the BIOS boots without mirroring configur...

Page 33: ... Hemisphere mode In hemisphere mode the address space of a CPU is subdivided into two sections called upper and lower hemisphere Data is distributed over these two sections for better performance As hemisphere mode is used for configurations with more than 4 CPUs an even number of CPUs is necessary to configure memory mirroring OK OK Disabled OK OK OK OK OK OK Failed Failed OK OK OK OK OK OK Faile...

Page 34: ...s to CPUs and IOHs for 4 6 and 8 CPUMEMRs CPU No DIMM slot pop order 4 CPUMEMRs 6 CPUMEMRs 8 CPUMEMRs IOH No 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G CPU 1 1 x x x 1 2 x x x x x x 3 x x x x x x x x x 4 x x x x x x x x x x x x CPU 2 1 x x x 1 2 x x x x x x 3 x x x x x x x x x 4 x x x x x x x x x x...

Page 35: ...2 x x x x 3 x x x x x x 4 x x x x x x x x CPU 7 0 4 1 x 2 x x 3 x x x 4 x x x x CPU 8 0 4 1 x 2 x x 3 x x x 4 x x x x CPU No DIMM slot pop order 4 CPUMEMRs 6 CPUMEMRs 8 CPUMEMRs IOH No 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G 1B 1D 1F 1H 1A 1C 1E 1G 2B 2D 2F 2H 2A 2C 2E 2G Table 6 DIMM slot population order and mapping of DIMM slots to I O Hub...

Page 36: ...cted to the baseboard via the PCIR connectors D F Faulty PCI cards can be detected in all PCIe slots via the CSS indicators B and H In addition PCI hot plug slots are equipped with the indicator I Figure 9 PCIe slots on the PCI Riser A and the baseboard E only PCI part is shown 1 2 3 4 6 7 5 C A C B C C C D C G C H C I C H C H C H C H C H C H C H C H C H C I C I C I C E C F ...

Page 37: ...eck carefully whether this PCIe slot is supported with the CPUMEMR configuration of the individual server Pos Slot no Description Hot plug A PCI Riser PCIR C 5 PCI Express 2 0 x4 1 2 length x8 connector no C 1 2 3 4 6 7 PCI Express 2 0 x8 1 2 length x8 connector no E Baseboard G 8 PCI Express 2 0 x8 1 2 length x8 connector for modular RAID controller only no G 9 10 11 12 PCI Express 2 0 x8 1 2 len...

Page 38: ...PUs CPU 8 CPUMEMR 8 CPU 7 CPUMEMR 7 IOH 4 CPUMEMR 1 CPU 1 CPU 2 CPUMEMR 2 IOH 1 CPU 4 CPUMEMR 4 CPU 3 CPUMEMR 3 IOH 2 CPU 6 CPUMEMR 6 CPU 5 CPUMEMR 5 IOH 3 PCIe 17 PCIe 7 PCIe 8 PCIe 9 PCIe 10 PCIe 11 PCIe 12 PCIe 13 PCIe 14 PCIe 15 PCIe 16 PCIe 2 PCIe 1 PCIe 5 PCIe 6 PCIe 4 PCIe 3 Modular RAID Hot plug PCI PCIR x8 x8 x8 x8 x8 x8 x8 x4 x8 x8 x8 x8 x8 x8 x8 x8 x4 ...

Page 39: ...RAID PCIe slot 1 PCI Riser PCIe slot 2 PCI Riser CPU 3 x x x 3 or 4 2 PCIe slot 5 PCI Riser Gen2x4 CPU 4 x x x PCIe slot 3 PCI Riser PCIe slot 4 PCI Riser PCIe slot 6 PCI Riser PCIe slot 7 PCI Riser CPU 5 x x 5 or 6 3 PCIe slot 9 hot plug CPU 6 x x PCIe slot 10 hot plug PCIe slot 11 hot plug PCIe slot 12 hot plug CPU 7 x 7 or 8 4 PCIe slot 17 Gen2x4 CPU 8 x PCIe slot 13 PCIe slot 14 PCIe slot 15 P...

Page 40: ...CIe slots Chipset IOH 1 IOH 2 Bus scan order 3 2 1 5 6 4 7 8 I O space assignment order within the I O Hub IOH 1 2 3 4 3 2 1 Hot plug n n n n n n n n Gen2 width x8 x8 x8 x8 x8 x4 x8 x8 Slot 1 2 8 3 4 5 6 7 Vendor Type PCIe Max LSI SAS 3Gb Gen1x4 3 x x x x x x Cougar2 Gen 2x8 1 x SAS RAID WASAT Gen 2x8 2 x 1 x 1 x 1 x 1 x 1 x 1 Emulex 4G FCx1 Gen 1x8 8 x x x x x x 4G FCx2 Gen 1x8 8 x x x x x x 8G F...

Page 41: ...an order 12 11 10 9 17 16 15 14 13 I O space assigning order within the I O Hub IOH 1 2 1 2 Hot plug y y y y n n n n n Gen2 width x8 x8 x8 x8 x8 x8 x8 x8 x4 Slot 9 10 11 12 13 14 15 16 17 Vendor Type PCIe Max LSI SAS 3Gb Gen1x4 3 x x x x Cougar2 Gen 2x8 1 SAS RAID WASAT Gen 2x8 2 x x Emulex 4G FCx1 Gen 1x8 8 x x x x x x x x 4G FCx2 Gen 1x8 8 x x x x x x x x 8G FCx1 Gen 2x8 8 2 2 2 2 x x x x 8G FCx...

Page 42: ...ure 11 Figure 11 I O space requirement 3 4 1 I O space requirements Figure 11 lists the I O space requirements where x indicates that I O space is required Please note that I O space assignment is only needed if Legacy LAN Boot PXE iSCSI and an LSI SAS SAS_RAID card is used PCIe card Firmware Option ROM Legacy EFI Driver BIOS Legacy OS EFI aware OS CSM Firmware ...

Page 43: ... assigns its I O space in several blocks of 4 KB ICH10 requires 1 block for Legacy support Auto and Disabled can be selected in the BIOS setup menu to assign I O space for onboard devices and for PCIe slots including slot 8 for the Modular RAID controller Auto is set for all onboard devices and PCIe slots by default Device Hardware Operating system I O space is requested in config space Option ROM...

Page 44: ...nter the BIOS Setup menu and to disable the assignment of I O space for devices that do not need I O space under OS operation Table 11 lists the I O space assignment for individual CPU configurations In the BIOS Setup menu you can choose from the following settings for the device per slot Auto I O space is assigned when the device requests for it Disabled I O space is not assigned even if the devi...

Page 45: ...ssignment to this device if you use PXE boot from the Onboard LAN controller as the Intel Boot Agent ROM requires I O space GbE 2 x x x 7 Modular RAID controller slot 8 x x x 6 Cougar2 controller requires I O space for operation GbE 3 x x x 5 Do not disabled I O space assignment to this device if you use PXE boot from Onboard LAN as the Intel Boot Agent ROM requires I O space 10GbE 1 x x x 4 Table...

Page 46: ... 8 Max 4 Max 4 4 PCIe slot 4 3 PCIe slot 5 5 PCIe slot 6 2 PCIe slot 7 1 PCIe slot 9 3 IOH 3 not recognized Max 4 Max 2 1 PCIe slot 10 2 PCIe slot 11 3 PCIe slot 12 4 Device slot I O Hub I O space block 4 KB each Remark 4 CPUs 6 CPUs 8 CPUs Assign order Table 11 I O space assignment for 4 6 and 8 CPU configurations ...

Page 47: ...not recognized IOH 4 not recognized Max 2 1 PCIe slot 14 2 PCIe slot 15 3 PCIe slot 16 4 PCIe slot 17 5 Sum Max 16 Max 16 Max 16 Device slot I O Hub I O space block 4 KB each Remark 4 CPUs 6 CPUs 8 CPUs Assign order Table 11 I O space assignment for 4 6 and 8 CPU configurations ...

Page 48: ...monitoring is controlled by an onboard controller that supports the following functions Temperature monitoring Measuring the processor temperature and ambient temperature by way of a temperature sensor Fan monitoring The fans are monitored Fans that are blocked sluggish or no longer available are detected Screen resolution pixel Refresh rate Hz No of bits per pixel 32x400 85 4 bpp 8 bpp 640x480 85...

Page 49: ...imum speed to ensure the highest possible protection of the hardware Voltage monitoring When the voltage exceeds or falls below the warning levels an alert is issued System Event Log SEL All monitored events of the system board are signalized via the Global Error LED or CSS LED and recorded in the System Event Log They can be retrieved in the iRMC S2 s Web interface or via the ServerView Operation...

Page 50: ...nboard connectors and indicators 3 7 1 1 Baseboard D3081 Figure 12 shows the onboard connectors on the baseboard where the individual connectors are named in table 13 Figure 12 Onboard connectors baseboard D3081 D C A C B C C C D C E C F C G C H C I C J C K C L C M ...

Page 51: ...n table 14 Pos Connector Pos Connector A PCI Riser H Chassis ID board B I O board I Operator panel C PCIe slots on the baseboard J Power distribution board D Trusted Platform Module TPM K Front video connector E USB Flash Module UFM L Front USB connector F FAN M SATA optical disk drive G CPU Memory Riser Table 13 Onboard connectors baseboard D3081 ...

Page 52: ...er has been removed If the server has been powered off power plugs must be disconnected it is possible to indicate the faulty component by pressing the indicate CSS button located on the PCI Riser Pos Indicator Pos Indicator A BMC heart beat C PCI hot plug power fault B POST code D PCIe CSS Table 14 Connectors on the baseboard D3081 C A C B C C C D ...

Page 53: ...e the individual connectors and indicators are named in table 15 Figure 14 Onboard connectors and indicators CPUMEMR D3131 Pos Connector Pos Indicator A CPU C DIMM CPU CPUMEMR CSS B CPUMEMR Table 15 Onboard connectors and indicators CPUMEMR D3131 B 1C 1D 1E 1F 1G 1H 1A 1B B 2C 2D 2E 2F 2G 2H 2A 2B CPU 1B 1D 1A 1C 2B 2D 2A 2C 1E 1G 2F 2H 1F 1H 2E 2G CPUMEMR C A C B C C ...

Page 54: ...onnectors and indicators on the PCIR where the individual connectors and indicators are named in table 16 Figure 15 Onboard connectors and indicators PCIR D3082 Pos Connector Pos Indicator A PCIe slots C PCIe CSS B PCIR D CSS button Table 16 Onboard connectors and indicators PCIR D3082 1 2 3 4 6 7 5 C A C B C C C D ...

Page 55: ...he onboard connector on the I O board Figure 16 Onboard connector on the I 0 board 3 7 2 Onboard DIP switch Figure 17 shows the position of the DIP switch where the DIP switch settings are named in table 17 I Default setting Switches 1 to 4 are set to Off Pos Connector A 1x USB connector C A ...

Page 56: ... protection is enabled in the BIOS Setup in Security menu the Password on boot field must be set to Enabled No Function Setting Description 1 1 Not used 1 2 Password SKIP On Password skip enabled Off Password skip disabled 1 3 BIOS Write Protect On BIOS can only be read Off BIOS can both be read and written to 1 4 CMOS clear On BIOS should clear CMOS area Table 17 DIP switch settings ON 1 1 1 2 1 ...

Page 57: ...he LAN indicators are explained in table 19 Figure 18 External connectors of the baseboard D3081 Pos Port Nr Connector Pos Indicator A 1x 100 MB Management LAN controller indicator description table 19 C Global error indicator orange CSS indicator yellow ID indicator blue A 1 1x GB Shared LAN controller indicator description table 19 A 2 6 5x GB System LAN controller indicator description table 19...

Page 58: ... possible to boot a system without its own boot hard disk via LAN PXE is supported for this The separate management LAN connector is used as a management interface iRMC S2 and is prepared for operation with the Remote Management Figure 19 shows the LAN indicators and table 19 explains how the LAN indicators indicate the state of the connection and the transfer rate Figure 19 LAN indicators B 7 8 2...

Page 59: ...e of 100 Mbit s Remains dark LAN transfer rate of 10 Mbit s C 10G LAN link transfer 10 GB system LAN Steady green signal LAN connection exists Remains dark no LAN connection exists Flashes green LAN transfer takes place D 10 100 1000 LAN speed shared LAN Steady yellow signal LAN transfer rate of 1 Gbit s Steady green signal LAN transfer rate of 100 Mbit s Remains dark LAN transfer rate of 10 Mbit ...

Page 60: ...signal LAN transfer rate of 100 Mbit s Remains dark LAN transfer rate of 10 Mbit s G Activity LAN link transfer management LAN Steady green signal LAN connection exists Remains dark no LAN connection exists Flashes green LAN transfer takes place Pos Indicator Function Description Table 19 LAN indicators ...

Page 61: ...I O board where the individual connectors and indicators are named in table 20 Figure 20 External connectors on the I O board The serial connector COM1 can be used as default interface or to communicate with the iRMC S2 Pos Connector A 4x USB B Serial COM1 C Video Table 20 External connectors on the I O board C A C C C B ...

Page 62: ...62 Technical Manual D3081 D3131 D3082 RX900 S1 Features ...

Page 63: ...m information a lithium battery is installed which supplies the CMOS memory with power If the battery voltage is too low or the battery is empty a corresponding error message is displayed The lithium battery must then be replaced The replacement procedure is explained in the PRIMERGY RX900 S1 Server Maintenance Manual ...

Page 64: ...64 Technical Manual D3081 D3131 D3082 RX900 S1 Replacing the lithium battery ...

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