QE MCUs 8-bit and 32-bit Comparison
QE128 Quick Reference User Guide, Rev. 1.0
Freescale Semiconductor
2-3
The ColdFire V1 core has two programming models, the user and supervisor. First, is the user
programming model which is the same as the M68000 family microprocessors and consists of the
following registers:
•
16 general-purpose 32-bit registers (D0-D7, A0-A7)
•
32-bit program counter (PC)
•
8-bit condition code register (CCR)
Figure 2-2. User Programming Model Registers
Data registers (D0-D7) -- These registers are used for bit, byte, word or longword operations. It can also
be used as index registers for effective address (<ea>) calculations.
Address registers (A0-A6) -- These registers can be used as software stack pointers, index registers or
based address registers. They can also be used as data operation
storage,word and longword operations.
Figure 2-4. Address Registers (A0–A6)
A7 -- Is a user stack pointer and is treated specifically by CPU.
Program counter (PC) -- This register contains the address of the currently executing instruction. The
PC increments its value or can be loaded with a new one when an instruction
is executing or when an exception occurs.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
Data
W
Figure 2-3. Data Registers (D0–D7)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
Address
W
D0
Data Registers
D1
D2
D3
D4
D5
D6
D7
31
0
A0
Address Registers
A1
A2
A3
A4
A5
A6
A7
31
0
SP
PC
CCR
