Freescale Semiconductor P&E Tracelink, User Manual, Page: 18 / 39

Tracelink User Manual 15
4 EXTERNAL TRACE OVERVIEW
This section provides an introduction to the vocabulary and methodologies of
debugging with external trace. Also discussed are general board and layout
guidelines to help improve signal integrity for the high-speed trace signals.
4.1 How External Trace Works
Below is a simple diagram of the trace process.
Figure 4-10: “Trace Flow” Diagram
When a microprocessor is properly configured for external trace and is executing
code, it will continuously generate trace data on designated output pins. The width of
the trace data port varies depending on the Freescale family and can range from a
single bit to 32-bits and higher. The trace data is always synchronized to the rising
and/or falling edges of the trace clock signal.
Note: On many microprocessors, the trace pins are often multiplexed with other functions
and will default as a general purpose input/output. These pins need to be configured
for trace functionality in the application’s initialization code.
The Tracelink monitors the trace clock signal and records the value of the trace data
pins when the appropriate clock edges occur. The data is saved into the Tracelink’s
internal 128MB buffer, which is later downloaded onto the host PC for analysis. The
software running on the host PC is responsible for decoding the trace data and
displaying it in a useful format to the developer.
4.2 Trace Types