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5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
X5
Freescale AISG Applications, East Kilbride
X6
X2
X3
X4
Audio - SAI Audio. AVB and TWRPI headers
Revision Information
0.1
Designer
Alasdair Robertson
Comments
Rev Date
Power - Switching voltage regulators
Reset and External Clock Input
Sheet 8
Sheet 9
Sheet 10
Sheet 11
Sheet 12
Sheet 13
Sheet 14
Sheet 15
Sheet 16
These schematics are provided for reference purposes only. As such,
Freescale does not make any warranty, implied or otherwise, as to the
suitability of circuit design or component selection (type or value) used in
these schematics for hardware design using the Freescale MPC574xG family
of Microprocessors. Customers using any part of these schematics as a
basis for hardware design, do so at their own risk and Freescale does not
assume any liability for such a hardware design.
Sheet 2
Sheet 3
Sheet 4
Sheet 5
Sheet 6
Sheet 7
Comms - CAN and LIN
Comms - Ethernet
Comms - USB Interfaces
Memory - SD Card Slot
AV - MOST Interface
User notes are given throughtout the schematics.
Specific PCB LAYOUT notes are detailed in ITALICS
Caution:
19 Feb 2012
Comms - RS232 (USB FTDI interface)
Comms - FlexRAY
User - Switches, LED's and Potentiometer
User - GPIO Pin Matrix
Table Of Contents:
Notes:
MPC574xx Customer Evaluation Board (X-MPC574XG-MB)
- All components and board processes are to be ROHS compliant
- All small capacitors are 0402 unless otherwise stated
- All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
- All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated
- All jumpers are denoted Jx. Jumpers are 2mm pitch
- Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2.
2 Pin jumpers generally have the "source" on pin 1.
- All switches are denoted SWx
- All test points (SMT wire loop style) are denoted TPx
- Test point Vias (just through hole pads) are denoted TPVx
X1
Power - Main input and Linear voltage regulators
Daughter Card Connectors (Sockets)
JTAG and Nexus Connectors
Start of capture, Working version
01 Feb 2012
1st release for internal review (Complete Board)
28 Feb 2012
Alasdair Robertson
Alasdair Robertson
2nd release for internal review (split into main board and DC)
Signals (ports) have not been routed via busses as this makes it harder to determine where each signal goes.
Alasdair Robertson
Version sent to Pre Layout, incorporating fixes from review
Final review (including new USB transceiver)
11 Mar 2013
Alasdair Robertson
13 Mar 2013
14 Mar 2013
Alasdair Robertson
Component consolodation, Few minor changes. Sent to Layout
3 Different test points used in design:
TPVx - Through Hole Pad small
TPHx - Through Hile Pad Large (for standard 0.1" header).
Also used on IO Matrix (IOMx)
TPX - Surface Mount Wire Loop
29 Mar 2013
Alasdair Robertson
Changes made during layout to Daughtercard Connectors
A
Post Layout (Back Annotated). Matches PCB RevA
Alasdair Robertson
02 Apr 2013
Alasdair Robertson
LAY RefDes Resequence and SCH BackAnnotate
X7
17 Apr 2013
AX1 24 Jun 2013
Alasdair Robertson
Fixes and changes to RevA Prototype design
AX2 10 July 2013
Alasdair Robertson
Added CAN Term (DNP)
AX3 12 July 2013
Alasdair Robertson
Corrected ground on ADC Pot
B
12 July 2013
Alasdair Robertson
Production Release
BX1 20 Aug 2013
Alasdair Robertson
Change to Ethernet 50MHz clock control
C
20 Aug 2013
Alasdair Robertson
Production Release
CX1 18 Dec 2013
Alasdair Robertson
CAN transceivers -> MC33901, ENET clock in RMII mode
CX2 05 May 2014
Alasdair Robertson
Added comment about LM1117 VREG output
CX3 25 June 2014
Alasdair Robertson
PH3..5 now GPIO matrix (was SAI), PM4, PD13, PM3 to SAI
CX4 26 June 2014
Alasdair Robertson
Minor changes made during layout (no component changes)
CX5 26 June 2014
Alasdair Robertson
Part Manager Tidy up
CX6 18 Aug 2014
Alasdair Robertson
Added additional connector with DSPI Signals for AVB
CX7 03 Sept 2014
Alasdair Robertson
Added additional TWRPI header (Sheet 12)
D
24 Sept 2014
Alasdair Robertson
Released to Production (RevD PCB)
D1
14 Aug 2015
Alasdair Robertson
Tidy up Schematics for UM (RevD PCB)
Drawing Title:
Size
Document Number
Rev
Date:
Sheet
of
Page Title:
Designer:
Drawn by:
Approved:
Automotive Microcontroller Applications
East Kilbride, Scotland
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale
SCH-27897 PDF: SPF-27897
D1
MPC574xx Customer EVB Main Board
B
Friday, August 14, 2015
Index and Title Page
A. Robertson
A. Robertson
A. Robertson
1
16
Freescale General Business Use
Drawing Title:
Size
Document Number
Rev
Date:
Sheet
of
Page Title:
Designer:
Drawn by:
Approved:
Automotive Microcontroller Applications
East Kilbride, Scotland
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale
SCH-27897 PDF: SPF-27897
D1
MPC574xx Customer EVB Main Board
B
Friday, August 14, 2015
Index and Title Page
A. Robertson
A. Robertson
A. Robertson
1
16
Freescale General Business Use
Drawing Title:
Size
Document Number
Rev
Date:
Sheet
of
Page Title:
Designer:
Drawn by:
Approved:
Automotive Microcontroller Applications
East Kilbride, Scotland
This document contains information proprietary to Freescale and shall not be used for engineering design,
procurement or manufacture in whole or in part without the express written permission of Freescale
SCH-27897 PDF: SPF-27897
D1
MPC574xx Customer EVB Main Board
B
Friday, August 14, 2015
Index and Title Page
A. Robertson
A. Robertson
A. Robertson
1
16
Freescale General Business Use
Summary of Contents for MPC5748G EVB
Page 35: ...Main EVB...
Page 52: ...324 BGA DC...
Page 61: ...256 BGA DC...
Page 70: ...176 QFP DC...
Page 79: ...100 QFP DC...