MPC5748G EVB User Guide, User Guide, Rev. 0, 08/2015
20
Freescale Semiconductor, Inc.
header fitted, routing the TX and RX signals from the MCU to the FTDI transceiver. No other
configuration is required.
Table 13. USB RS232 Control Jumpers
Jumper
Position
PCB Legend
Description
J16
Posn 1-2
FITTED (
D
)
RX
MCU LIN2_RX signal (PC9) is routed to the FTDI interface
Removed
MCU LIN2_RX signal (PC9) is not routed to the
FTDI
interface
J16
Posn 3-4
FITTED (
D
)
TX
MCU LIN2_TX signal (PC8) is routed to the FTDI interface
Removed
MCU LIN2_TX signal (PC8) is not routed to the
FTDI
interface
NOTE
Care should be taken when fitting the jumper headers to the 2x2 jumper
block J16 as they can easily be fitted in the incorrect orientation. Jumper
headers should be fitted
horizontally.
The MCU LIN2 (SCI) pins are powered from the VDD_HV_A domain, which is configured between
3.3V and 5.0V on the daughtercard using jumper J5. The FTDI transceiver I/O voltage pin is connected
to the PER_HVA net configured with jumper J24 on the main EVB. Care must be taken to ensure that
the MCU VDD_HV_A and PER_HVA supplies are the same when using the FTDI transceiver.
6.4. USB HOST / OTG Interfaces
The EVB includes Type A (Host) and Type AB (OTG) USB interfaces, routed to standard and micro
USB sockets respectively. Each USB circuit contains a USB83340 transceiver with a shared USB power
switch. There is no user configuration required on either of the USB circuits.
The USB transceivers have a 3.3V (only) interface. All of the USB0 (connected to the OTG transceiver)
and USB1 (connected to the HOST transceiver) signals are in the VDD_HV_A domain and must be
configured as 3.3V via daughtercard jumper J5. If VDD_HV_A is set to 5V, the USB0 and USB1 MCU
signals should be left tri-stated to prevent damage to the USB transceivers.
6.5. Ethernet (P6, J5, J6, J7, J8, R45, R80)
The MPC5748G supports both MII and RMII Ethernet interfaces. The EVB incorporates a DP83848c
transceiver supporting both MII and RMII modes. The transceiver is connected to a pulse J1011F21PNL
RJ45 connector which includes a built-in isolation transformer.
The default configuration, with all 2-way jumpers fitted and all 3-way jumpers in position 1-2,
configures the transceiver for MII mode with the reset signal to the PHY being driven from the MCU
Reset out (eg any reset causing the MCU Reset line to assert will reset the PHY)
In order to configure the EVB for RMII mode, jumpers J5, J6 and J7 need to be changed as described in
Table 14 below. In addition, a surface mount 0Ω resistor needs to be de-soldered and moved as shown in
the figure below. This option is fitted as a resistor instead of a jumper to maintain signal integrity on the
Ethernet clock signal.
The USB interfaces
are on the top right
quarter on the board
on the top edge
The USB interfaces
are on the top right
quarter on the board
on the top edge
Summary of Contents for MPC5748G EVB
Page 35: ...Main EVB...
Page 52: ...324 BGA DC...
Page 61: ...256 BGA DC...
Page 70: ...176 QFP DC...
Page 79: ...100 QFP DC...