Freescale Semiconductor MPC5675EVB, User Manual

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MPC5675EVB Users Manual Rev 2.0 July 2010
MPC5675EVB Page 3 of 29
Table 3-1 MCU Power Supply Jumpers
Power
Domain
Jumper Position Description
3.3V
J41
(VDD_HV_IO)
1-2 (D) This supplies the IO with 3.3v
3.3v/1.8v
J63
(VDD_HV_DRAM)
1-2 (D) 3.3 V to supply HV_DRAM with 1.8v option
Position 2 External supplies can be added to pin 2 if extra
DRAM voltages are required.
GND
J58
(VDD_DRAM_VTT)
1-2 (D) Grounded for Mobile DDR termination
External supplies can be added to pin 2 if extra
DRAM voltages are required
3.3v
J55
(VDD_HV_FLA)
1-2 (D) 3.3v supply to HV_FLA
3.3v
J56
(VDD_HV_PDI)
1-2 (D) 3.3v to supply PDI
External supplies can be added to pin 2 if extra
PDI voltages are required.
3.3v
J40
(VDD_HV_OSC)
1-2 (D) 3.3v to Oscillator circuitry
3.3v
J44
(VDD_HV_ADV)
1-2 (D) 3.3v to ADC circuitry
3.3v/5.0v
J78
(VDD_HV_ADR)
1-2 (D) ADC Reference voltage 3.3v
ADC Reference voltage 5.0v
1.2v
J46
(VDD_LV_COR)
1-2 (D) Supplies the core with 1.2v in external mode
ONLY. Do not populate if generating core
voltage from internal VREG. This may damage
the device.
3.3v/5.0v
J79
(VDD_HV_PMU)
2-3 (D) 3.3v supply for the PMU(VREG).
5.0v supply for the PMU(VREG).
1.2v
J59
(VREG_CTRL)
1-2 This should always be populated
3.3v/5.0v
J57
(PMU)
1-2 This should always be populated
The jumper configuration shown in Table 3-1, details the default state (D) of the EVB. In this
configuration all power is supplied from the regulators.