Freescale Semiconductor MPC5675EVB, User Manual

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MPC5675EVB Users Manual Rev 2.0 July 2010
MPC5675EVB Page 5 of 29
3.2.2 Reset Boot Configuration (J69, J34, J37)
The MPC5675 has 3 boot configuration jumpers (BOOTCFG) that determines the boot location of the
MCU based at POR (Power On Reset). This is shown in the table below:
Table 3-3 BOOTCFG Control
J64 (FAB) J37 (ABS2) J34 (ABS0) Boot ID Boot Mode
2-3 1-2 1-2 - Serial Boot LINFlex
2-3 1-2 2-3 - Serial Boot FlexCAN
2-3 2-3 1-2 - Serial Boot via LINFlexD or FlexCAN in autobaud
1-2 - - Valid SC (Single Chip)
1-2 - - Not Valid Safe Mode
3.3 ONCE and Nexus
The EVB supports a standard JTAG / ONCE cable with a 14-pin 0.1” walled header footprint. There is
also a 50-pin Samtec ERF8 connector for Nexus debug.
3.3.1 Debug Connector Pinouts
The EVB is fitted with 14-pin JTAG / ONCE and 50-pin Nexus debug connectors. The following
diagram shows the 14-pin JTAG / ONCE connector pin out (0.1” keyed header).
Figure 3-5. MPC5675 JTAG / ONCE Connector
The Nexus module used on the MPC5675K family uses the JTAG pins (for control of the Nexus block)
along with additional Nexus pins for trace messages. Nexus mode is entered by a JTAG sequence
whereby the Nexus EVTI pin is sampled on the rising edge of the JTAG TRST pin. If the EVTI is
asserted on TRST, Nexus is enabled.
The table below shows the pin out of the 50-pin Samtec ERF8 Nexus connector for the MPC5675K.
The new 50 pin Nexus connector has been used to support the new 16 MDO channels.
2 VSS
4 VSS
6 VSS
8 N/C
10 TMS
12 VSS
14 JCOMP
TDI 1
TDO3
TCLK 5
5v EVTI 7
RESET 9
VDDE2 11
RDY 13
ON