Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 18-43
18.3.3.5 ADC n Offset Calibration Constant Registers (ADC0_OCCR and
ADC1_OCCR)
The ADC n _OCCR contains the offset calibration constant used to fine-tune of ADC0/1 conversion results.
The offset constant is a signed 14-bit integer value. Refer to Section 18.4.5.4, “ADC Calibration Feature ,”
for details about the calibration scheme used in the eQADC.
Address: 0x04 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0
GCC0
W
Reset 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0
GCC1
W
Reset 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 18-22. ADC n Gain Calibration Constant Registers (ADC n _GCCR)
Table 18-32. ADC n _GCCR Field Descriptions
Field Description
0 Reserved.
1–15
GCC n
[0:14]
ADC n gain calibration constant. Contains the gain calibration constant used to fine-tune ADC n conversion results. It
is a unsigned 15-bit fixed pointed value. The gain calibration constant is an unsigned fixed point number expressed
in the
GCC_INT.GCC_FRAC binary format. The integer part of the gain constant (GCC_INT) contains a single binary
digit while its fractional part (GCC_FRAC) contains 14 digits. For details about the GCC data format refer to
Section 18.4.5.4.2, “MAC Unit and Operand Data Format .”
Address: 0x05 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0
OCC0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0
OCC1
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 18-23. ADC n Offset Calibration Constant Registers (ADC n _OCCR)