WDOG_UNLOCK field descriptions
Field
Description
15–0
WDOGUNLOCK
Writing the unlock sequence values to this register to makes the watchdog write-once registers writable
again. The required unlock sequence is 0xC520 followed by 0xD928 within 20 bus clock cycles. A valid
unlock sequence opens a window equal in length to the WCT within which you can update the registers.
Writing a value other than the above mentioned sequence or if the sequence is longer than 20 bus cycles,
resets the system or if IRQRSTEN is set, it interrupts and then resets the system. The unlock sequence is
effective only if ALLOWUPDATE is set.
24.7.9 Watchdog Timer Output Register High (WDOG_TMROUTH)
Address: 4005_2000h base + 10h offset = 4005_2010h
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
WDOG_TMROUTH field descriptions
Field
Description
15–0
TIMEROUTHIGH
Shows the value of the upper 16 bits of the watchdog timer.
24.7.10 Watchdog Timer Output Register Low (WDOG_TMROUTL)
During Stop mode, the WDOG_TIMER_OUT will be caught at the pre-stop value of the
watchdog timer. After exiting Stop mode, a maximum delay of 1 WDOG_CLK cycle + 3
bus clock cycles will occur before the WDOG_TIMER_OUT starts following the
watchdog timer.
Address: 4005_2000h base + 12h offset = 4005_2012h
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
WDOG_TMROUTL field descriptions
Field
Description
15–0
TIMEROUTLOW
Shows the value of the lower 16 bits of the watchdog timer.
Memory map and register definition
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
526
Freescale Semiconductor, Inc.
