Freescale Semiconductor *KE02 Series, Technical Data Manual

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2
10
6 7
MSB IN
BIT 6 . . . 1
SLAVE MSB
SLAVE LSB OUT
11
5 5
3
8
4
13
NOTE: Not defined
12
12
11
SEE
NOTE
13
9
see
note
(INPUT)
(CPOL=0)
SPSCK
SPSCK
(CPOL=1)
SS
(INPUT)
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
LSB IN
BIT 6 . . . 1
Figure 19. SPI slave mode timing (CPHA = 0)
2
6 7
MSB IN
BIT 6 . . . 1
MSB OUT SLAVE LSB OUT
5 5
10
12 13
3
12 13
4
SLAVE
8
9
see
note
(INPUT)
(CPOL=0)
SPSCK
SPSCK
(CPOL=1)
SS
(INPUT)
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
NOTE: Not defined
11
LSB IN BIT 6 . . . 1
Figure 20. SPI slave mode timing (CPHA=1)
Dimensions
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
7
Dimensions
KE02 Sub-Family Data Sheet, Rev4, 10/2014.
30 Freescale Semiconductor, Inc.