FII-PRA006/010 Hardware Reference Guide
Fraser Innovation Inc
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Figure 7.1 Schematics of Gigabit Ethernet Chip
Figure 7.2 Gigabit Ethernet Physical Picture
Gigabit ethernet pin assignment
Signal Name
FPGA Pin
RG0_RXCTL
34
RG0_RX0
33
RG0_RX1
32
RG0_RX2
31
RG0_RX3
28
RG0_RXCK
24
RG0_TXCK
43
RG0_TX0
51
RG0_TX1
50
RG0_TX2
49
RG0_TX3
46
RG0_TXCTL
42
NPHY_MDC
38
NPNY_MDIO
39