XRT73L04A
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 2.0.3
16
N
OTES
:
1. All XRT73L04A digital inputs are designed to be
TTL 5V compliant.
2. All XRT73L04A digital outputs are also TTL 5V
compliant. However, these outputs will not drive to
5V nor will they accept external 5V pull-ups.
E
LECTRICAL
C
HARACTERISTICS
(C
ONTINUED
) (T
A
= 25
°
C, V
DD
= 3.3V + 5%,
UNLESS
OTHERWISE
SPECIFIED
)
AC E
LECTRICAL
C
HARACTERISTICS
(S
EE
T
ERMINAL
S
IDE
T
IMING
P
ARAMETERS
(S
EE
AND
7) -- {(n) = 0, 1, 2
OR
3 }
S
YMBOL
P
ARAMETER
M
IN
.
TYP
.
M
AX
.
U
NITS
TxClk_(n) Clock Duty Cycle (STS-1/DS3)
30
50
70
%
TxClk_(n) Clock Duty Cycle (E3)
30
50
70
%
TxClk_(n) Frequency (SONET STS-1)
51.84
MHz
TxClk_(n) Frequency (DS3)
44.736
MHz
TxClk_(n) Frequency (E3)
34.368
MHz
t
RTX
TxClk_(n) Clock Rise Time (10% to 90%)
3
5
ns
t
FTX
TxClk_(n) Clock Fall Time (90% to 10%)
3
5
ns
t
TSU
TPData_(n)/TNData_(n) to TxClk_(n) Falling Set up time
3
1.5
ns
t
THO
TPData_(n)/TNData_(n) to TxClk_(n) Falling Hold time
3
1.5
ns
t
LCVO
RxClk_(n) to rising edge of LCV_(n) output delay
2.5
ns
t
TDY
TTIP_(n)/TRing_(n) to TxClk_(n) Rising Propagation Delay time
8
ns
RxClk_(n) Clock Duty Cycle
50
%
RxClk_(n) Frequency (SONET STS-1)
51.84
MHz
RxClk_(n) Frequency (DS3)
44.736
MHz
RxClk_(n) Frequency (E3)
34.368
MHz
t
CO
RxClk_(n) to RPOS_(n)/RNEG_(n) Delay Time
0
2.5
ns
t
RRX
RxClk_(n) Clock Rise Time (10% to 90%)
1.5
ns
t
FRX
RxClk_(n) Clock Fall Time (10% to 90%)
1.5
ns
C
I
Input Capacitance
10
pF
C
L
Load Capacitance
10
pF
