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SPM Management 

 

24 

 
 

External Power Button PWRBTN#  

A low signal in the Power Button pin (if enabled) can be used to turn-on or turn-off the system from the low 
power mode. A low level at this pin activates the wake-up functionality. 

Wake on RTC 

A hardware wake-up event from the sleeping state can be made at a predetermined time with an RTC alarm. 
In this case please be careful that the RTC is upgraded (Eurotech BIOS provides a user friendly interface to 
update the time and date), users have to initialise the RTC alarm registers and place the CPU into Low 
power consumption mode, when RTC reach RTC alarm count the CPU is waked up. 
 
Please refer to Chapter 6 for a practical example using the Wake on RTC functionality. 

An0065. CPU-1450 Soft Power Management 

 

Summary of Contents for CPU-1450

Page 1: ...Rev 1 0 Feb 2006 An0065 CPU 1450 Soft Power Management...

Page 2: ...out notice Warranty This product is supplied with a limited warranty The product warranty covers failure of any Eurotech manufactured product caused by manufacturing defects Eurotech will make all rea...

Page 3: ...throughout this guide Warnings and Important Notices Warning Information to alert you to potential damage to a program system or device or potential personal injury Information note Indicates importan...

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Page 5: ...Power mode 22 ATX Power Button 22 External Power Button 22 Software 22 Wake up events 23 Serial port Ring Indicator 23 Ethernet 23 External Power Button PWRBTN 24 Wake on RTC 24 Chapter 5 Soft Power M...

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Page 7: ...ppens When the CPU 1450 module is powered off with SPM just a little part of the board remains supplied This part monitors the system inputs looking for wake up events The low power mode can be activa...

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Page 9: ...chitecture that focuses on the chipset that manages the power saving functions In the diagram the dotted lines show the previous block differences Consider that the Celeron Processor Module is fully A...

Page 10: ...revious diagram show the different power lines used to supply peripherals during different power states The chipset can easily understand the wake up source A good point of start to better understand...

Page 11: ...ut power is shut off to non critical circuits Memory is retained and refreshes continue All clocks stop except RTC clock G1 S4 Suspend To Disk STD 1 The context of the system is maintained on the disk...

Page 12: ...entered or exited depending on some specific signals listed in Table 3 Name Type Description SLP_S3 Internal Power plane control This signal is used to shut off power to all non critical systems when...

Page 13: ...LK goes inactive and previously in C1 Power Button Override Power Failure G0 S0 C0 G0 S0 C1 G2 S5 G3 G0 S0 C3 ICH2 M only Any Enabled Break Event STPCLK goes inactive and previously in C1 Power Button...

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Page 15: ...ices and to supply the CPU 1450 in a Power Management compliant mode Considering that we support the following external wake up capabilities Wake On LAN Serial Ring Indicator Power Button We will docu...

Page 16: ...ector Layout Table 5 J12 Connector pin out Pin Signal 1 3 3VSB 2 ACTIVITY LED 3 RX 4 RX 5 LINK LED 6 GND 7 TX 8 TX The Eurotech Ethernet Transceiver An0065 CPU 1450 Soft Power Management To establish...

Page 17: ...a transistor that drives the RI pin of the ICH2 Furthermore the high level must be applied using a current limiting resistor The limiting resistor should be 1 kOhm for each volt applied limiting the...

Page 18: ...Always from the ATX Power supply 2 PSON Power On command to ATX Power supply 3 PWRBTN or Power button If the soft power management is enabled a low signal in this pin turns the system on or off Notes...

Page 19: ...VDC and 12VDC voltages are neither used nor generated by the CPU 1450 module they are only conveyed on the PC 104Plus bus connector J1 and can be used by other devices or modules that are stacked onto...

Page 20: ...limited and shown in the following image J23 DTK 1450 J9 CPU 1450 Figure 6 DTK Power Saving Connections In this application note we assume that you are using a development system where a CPU 1450 is i...

Page 21: ...lated logic are battery backed up to retain the configuration of wake up events upon a loss of power i e VDD 0V and 5VSB 0V The battery can be connected through pin 7 and pin 1 of the Multifunction VG...

Page 22: ...e power off position External Power Button The external Power Button PWR_BTN pin 10 of the J11 connector has to be connected between pin 10 and 7 of the J11 connector to allow the user to power down o...

Page 23: ...nd monitors the network looking for a Wake up Frame a Magic Packet or a Link change and notifies the event via the internal PME signal Magic Packet from the network A remote Computer can utilize the M...

Page 24: ...eeping state can be made at a predetermined time with an RTC alarm In this case please be careful that the RTC is upgraded Eurotech BIOS provides a user friendly interface to update the time and date...

Page 25: ...riting 0 has no effect Status bits only generate interrupts while their associated bit in the enable register is set Function bit positions in the status register have the same bit position in the ena...

Page 26: ...address 6000h Power Management 1 Status Register Used to read and clear wake status PM1_EN I O address 6002h Power Management 1 Enable Register Used to enable wake events as RTC PM1_CNT I O address 6...

Page 27: ...ing a 1 to it 1 Set by hardware anytime a Power Button Override Event occurs which occurs when the power button is pressed for at least 4 consecutive seconds The power button override causes an uncond...

Page 28: ...MI or wake event is generated then RTC_STS goes active 8 Power Button Enable PWRBTN_EN R W This bit is used to enable the setting of the PWRBTN_STS bit to generate a power management event SMI SCI PWR...

Page 29: ...WO 1 ACPI software writes a 1 to this bit to raise an event to the BIOS BIOS software has corresponding enable and status bits to control its ability to receive ACPI events 0 This bit always reads as...

Page 30: ...or a CF9h write Assertion of RTCRST resets this bit 0 Disable 1 Enables the setting of the RI_STS to generate a wake event 7 Reserved 6 TCO SCI Enable TCOSCI_EN R W 0 Disable 1 Enables the setting of...

Page 31: ...O byte locations The base address of this register pair is determined during reset according to the state of the hardware strapping option on the BADDR pin The following table shows the selected base...

Page 32: ...meout This is a R W bit Bits 5 4 Value Seconds 0 0 0 4 to 0 9 typical 0 6 0 1 0 9 to 1 4 typical 1 1 1 0 1 4 to 1 9 typical 1 6 1 1 1 9 to 2 5 typical 2 1 default at VPP power up reset Note that for a...

Page 33: ...iled with Watcom C see bibliography We are going to analyse some examples that may be useful understanding the following Wake up events Wake On RTC Serial Port Ring Indicator pin Wake On LAN Ethernet...

Page 34: ...ue n getch outp 0x2E 0x2D Super IO PC87364 Initialization outp 0x2F 0x19 set ACPI mode in SIO Configure the RTC Register accessing using the Index and Target registers refer to the following table for...

Page 35: ...ster A 03h Minutes Alarm 0Bh Register B 04h Hours 0Ch Register C 05h Hours Alarm 0Dh Register D 06h Day of Week 0Eh 7Fh 114 Bytes of User RAM 07h Day of Month Table 16 RTC Standard RAM Bank An0065 CPU...

Page 36: ...07 02 2006 void main printf Eurotech S p a CPU 1450 Wake On Serial Ring n printf Put to sleep a Cpu1450 with pme and ring enabled n printf npress any key to continue n getch outp 0x2E 0x2D Super IO P...

Page 37: ...an example of the command line for Bustrek C Bustrek pwb 1 8 0 E1 41 4 Execute the same code of the Wake on Ring Indicator Pulse example and put to sleep the CPU The CPU is now in a low power consump...

Page 38: ...der Linux you can use the EtherWake program with the following syntax Where ethxx is the host Ethernet adapter where the CPU is connected the XX XX XX XX XX XX field is the MAC address of the CPU the...

Page 39: ...disk sleep mode Cable disconnected 0 75 W Soft off or suspend to disk sleep mode Link at 10 MBIT 0 68 W Soft off or suspend to disk sleep mode Link at 100 MBIT 0 90 W Table 17 CPU 1450 Power Consumpt...

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Page 41: ...Chapter 8 Appendix...

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Page 43: ...section of the CPU 1450 Related Documents For more information please refer to the CPU 1450 user manual http www eurotech it Super I O PC87364 www national com ICH2 82801 www intel com Open Watcom C h...

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