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AIM104-COM8 Technical Manual

I/O map

© 2007 Eurotech Ltd Issue C

10

UART structure

Each channel occupies 8 bytes of I/O space with the following registers defined:

Offset Register

Read

Write

+0

RHR/THR

Receive Holding Register Transmit Holding

Register

+1

IER

Interrupt Enable Register

+2

ISR/FCR

Interrupt Status Register

FIFO Control Register

+3

LCR

Line Control Register

+4

MCR

Modem Control Register

+5

LSR

Line Status Register

+6

MSR

Modem Status Register

+7

SCR

Scratchpad Register

General

Register Set

(DLAB [ICR:7] set)

+0

DLL

LSB of Divisor Latch

+1

DLM

MSB of Divisor Latch.

Baud Rate Register

(DLAB [ICR:7] clear)

If you are planning to write your own low level software for the AIM104-COM8, refer to
the datasheet for the Exar ST16C554 device. This is available to download from

You can also download some example C source code from

www.eurotech-ltd.co.uk

.

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Summary of Contents for AIM104-COM8

Page 1: ...AIM104 COM8 8 Channel RS232 PC 104 Board Technical Manual ...

Page 2: ... product caused by manufacturing defects The warranty on all third party manufactured products utilised by Eurotech Ltd is limited to 1 year Eurotech Ltd will make all reasonable effort to repair the product or replace it with an identical variant Eurotech Ltd reserves the right to replace the returned product with an alternative variant or an equivalent fit form and functional product Delivery ch...

Page 3: ...items are provided 7 Getting started 7 Unpacking and connecting up 7 Description 8 I O map 9 UART structure 10 Interrupts 11 Jumpers 12 Default settings 12 Cable connections 17 Appendix A Contacting Eurotech Ltd 18 Appendix B Connector details 19 Appendix C Notes on using the 16C550 UART 21 Appendix D RoHS 6 Compliance Materials Declaration Form 23 Index 24 ...

Page 4: ...nnels Transfer rates up to 115 2Kbaud supported 5V only operation All channels can appear as a block anywhere in I O address range 000 3FFh First four channels can be individually set as standard PC AT COM1 4 Each QUART Quad UART can drive one link selectable IRQ in the range 3 4 5 7 9 10 11 12 14 15 The two QUART interrupts can be combined to drive one IRQ PC 104 16 bit interface but can be used ...

Page 5: ...requency host PC 104 system It includes filter components on all serial I O lines It is possible to capacitively couple the board ground to the chassis using metal pillars and fastenings at the mounting hole marked CHASSIS This is shown in the following diagram Packaging Should a board need to be returned to Eurotech Ltd please ensure that it is adequately packed preferably in the original packing...

Page 6: ...owing symbols are used in this guide Symbol Explanation Note information that requires your attention Tip a handy hint that may provide a useful alternative or save time Caution proceeding with a course of action may damage your equipment or result in loss of data Terminology To prevent confusion with the standard PC AT nomenclature of COM1 4 this manual refers to the channels on the AIM104 COM8 a...

Page 7: ...e following items The AIM104 COM8 board Mounting kit Getting started Unpacking and connecting up To begin using the AIM104 COM8 board follow these steps 1 Power down your computer 2 Install the board in a spare PCI slot 3 Power up your computer and install the appropriate driver available from our website www eurotech ltd co uk en downloads ...

Page 8: ... relocated at standard PC AT communications channel addresses for COM1 4 respectively See JP3 Channel re mapping to COM addresses page 15 for further details about address mapping Each QUART has its own interrupt line that can be linked to any of the following PC 104 interrupts IRQ3 5 7 9 12 14 15 The interrupt lines from the second QUART chips can be merged with the first to drive a single IRQ li...

Page 9: ...lly relocated at standard PC AT communications channel addresses for COM1 4 respectively As this is done these channels disappear from the group until only the last four remain When that happens the board logic knows that it has only 32 bytes in the group and so decodes those channels as a 32 byte block Group addressed map 000 base address PC COM port locations 00 Channel 0 000 08 Channel 1 02E8 2...

Page 10: ...ol Register 3 LCR Line Control Register 4 MCR Modem Control Register 5 LSR Line Status Register 6 MSR Modem Status Register 7 SCR Scratchpad Register General Register Set DLAB ICR 7 set 0 DLL LSB of Divisor Latch 1 DLM MSB of Divisor Latch Baud Rate Register DLAB ICR 7 clear If you are planning to write your own low level software for the AIM104 COM8 refer to the datasheet for the Exar ST16C554 de...

Page 11: ...nterrupts The first four channels drive one shared interrupt line and the last four channels drive another These IRQ lines can be selected from IRQ3 4 5 7 9 10 11 12 14 or 15 IRQs 10 11 12 14 and 15 are only available when the AIM104 COM8 is used in a 16 bit PC 104 stack ...

Page 12: ...ectable jumpers on the AIM104 COM8 These are used to configure the I O address and the interrupt line for each QUART Default settings The default positions of the jumpers are as follows Refer to the documentation supplied with your CPU card to establish which spare I O and interrupt channels to use ...

Page 13: ...s IRQ line to IRQ7 IRQ9 Routes IRQ line to IRQ9 IRQ10 Routes IRQ line to IRQ10 IRQ11 Routes IRQ line to IRQ11 IRQ12 Routes IRQ line to IRQ12 IRQ14 Routes IRQ line to IRQ14 IRQ15 Routes IRQ line to IRQ15 A B When jumper JP3 see page 15 is set to IRQ side A is for all channels and the signal on side B becomes tri stated so that it does not interrupt on both sides In this case the link on side B shou...

Page 14: ...e address line to zero for the decode Leaving the link off means that the corresponding address line must be a logic 1 to select the board JP2 Line Function when fitted A9 Sets A9 in I O address decode to 0 A8 Sets A8 in I O address decode to 0 A7 Sets A7 in I O address decode to 0 A6 Sets A6 in I O address decode to 0 A5 Sets A5 in I O address decode to 0 A4 Sets A4 in I O address decode to 0 The...

Page 15: ... the group decoding overlapping COM decoding If there is a conflict then the group decoding applies and any conflicting COM decoded channel The decoding logic above ensures the minimum use of scarce I O locations JP3 Line Function when fitted OPT0 Channel 0 remapped to COM1 OPT1 Channel 1 remapped to COM2 OPT2 Channel 2 remapped to COM3 OPT3 Channel 3 remapped to COM4 OPT4 Disables I O address dec...

Page 16: ...wait for a fixed time for PC104 bus access If the zero wait state 0WS is selected this waiting is skipped and the signal is asserted as soon as the board decodes a valid address This can shorten the amount of time spent accessing the board in some situations JP4 Description Waits for bus access Zero wait Default setting ...

Page 17: ...rs with standard pin outs for PC AT RS232 serial ports The table below shows the corresponding channel and connector pinouts 40 way IDC ribbon header Male 9 way IDC D sub Channel Pinout Pins 1 9 Pins 1 9 0 PC AT RS232 port Pins 11 19 Pins 1 9 1 PC AT RS232 port Pins 21 29 Pins 1 9 2 PC AT RS232 port Pins 31 39 Pins 1 9 3 PC AT RS232 port The same cabling applies to both of the 40 way boxed headers...

Page 18: ...uyer Eurotech Ltd s entire liability in respect of the boards or systems is as set out in Eurotech Ltd s standard terms and conditions of sale If you intend to write your own low level software you can start with the source code on the disk supplied This is example code only to illustrate use on Eurotech Ltd s products It has not been commercially tested No warranty is made in respect of this code...

Page 19: ...tails for these connectors are shown below J3 channel 0 3 Connector 40 way 2 54mm 0 1 x 2 54mm 0 1 dual row right angle boxed header Mating Connector Framatome 71600 040 Pin Signal Name Pin Signal Name 1 DCD0 2 DSR0 3 RXD0 4 RTS0 5 TXD0 6 CTS0 7 DTR0 8 RI0 9 GND 10 GND 11 DCD1 12 DSR1 13 RXD1 14 RTS1 15 TXD1 16 CTS1 17 DTR1 18 RI1 19 GND 20 GND 21 DCD2 22 DSR2 23 RXD2 24 RTS2 25 TXD2 26 CTS2 27 DT...

Page 20: ... Mating Connector Framatome 71600 040 Pin Signal Name Pin Signal Name 1 DCD4 2 DSR4 3 RXD4 4 RTS4 5 TXD4 6 CTS4 7 DTR4 8 RI4 9 GND 10 GND 11 DCD5 12 DSR5 13 RXD5 14 RTS5 15 TXD5 16 CTS5 17 DTR5 18 RI5 19 GND 20 GND 21 DCD6 22 DSR6 23 RXD6 24 RTS6 25 TXD6 26 CTS6 27 DTR6 28 RI6 29 GND 30 GND 31 DCD7 32 DSR7 33 RXD7 34 RTS7 35 TXD7 36 CTS7 37 DTR7 38 RI7 39 GND 40 GND 40 1 39 2 ...

Page 21: ... buffer This can enhance the performance of the serial ports and reduce the interrupt rate to the main processor However it is necessary to set up the receive trigger point optically for your application With the FIFO enabled any character received is added to the 16 byte receive FIFO This has four programmable trigger points as shown in the following diagram Once the FIFO has received sufficient ...

Page 22: ...ple communications at 9600 baud 8 data bits no parity and 1 stop bit have the following timeout period 4 x 8 12 44 T 4 4 chars 0 8 1 1 10 4 x 8 12 44 t 4 58 ms 9600 9600 This timeout can significantly impact on the performance of the serial communications within an application If your serial communications is single character oriented it is better to set the FIFO trigger point lower and handle mor...

Page 23: ...ducts covered by this certificate include Product Name Eurotech Ltd Part Number AIM104 COM8 AIM104 COM8 R6 both variants Eurotech Ltd has based its material content knowledge on a combination of information provided by third parties and auditing our suppliers and sub contractor s operational activities and arrangements This information is archived within the associated Technical Construction File ...

Page 24: ...n 14 H handling 5 I I O address configuration 12 I O address mapping 8 15 I O map 9 IER 10 interrupt 4 8 11 interrupt activity LED 4 interrupt enable register 10 Interrupt selection 13 interrupt status register 10 IRQ 8 11 ISR 10 J JP1 Interrupt selection 13 JP2 Group base address selection 14 JP3 Channel re mapping to COM addresses 15 JP4 Wait state behavior selection 16 L LCR 10 LED 4 access 4 i...

Page 25: ...map channel 8 15 RoHS 6 compliance 5 23 RS232 8 RXD 4 19 20 S SCR 10 scratchpad register 10 source code 18 static 5 storage 5 support technical 18 T technical support 18 temperature 4 trademarks 2 transmit holding register 10 trigger point 21 TXD 4 19 20 U uart 21 UART 4 V voltage 4 W wait state 16 Z zero wait state 4 8 ...

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