Schematic Diagrams
B - 14 M92 S2 PCIE Interface
B.Schematic Diagrams
M92 S2 PCIE Interface
3. 3V
1. 1 V _ 1 . 0 V _ P W R
1 4 , 15 , 1 6 , 1 9
3. 3 V
3 , 4 , 1 2, 2 0 , 2 1 , 2 2, 24 , 2 5 , 2 7 , 29 , 3 0 , 3 1 , 32 , 3 3 , 3 4 , 37 , 3 9 , 4 0 , 4 1
P R 21 8
*1 0 K _ 0 4 _+ U
FOR SWITCHABLE
P E G _T X 5
3
P E G _T X 4
3
P E G _T X # 6
3
P E G _T X # 5
3
P E G _T X 1
3
P E G _T X # 4
3
P E G _T X 2
3
P E G _T X 3
3
P E G _T X # 7
3
P E G _T X # 3
3
P E G _T X 7
3
P E G _T X # 1
3
P E G _T X # 0
3
P E G _T X # 2
3
P E G _T X 6
3
P E G _T X 0
3
Z 15 0 2
3. 3 V S
2 , 1 0 , 11 , 1 2 , 1 4 , 20 , 2 1 , 2 2 , 2 3, 2 4 , 2 5 , 2 6, 2 7 , 2 9 , 3 0, 3 1 , 3 2 , 3 3, 35 , 3 6 , 3 7 , 42 , 4 3 , 4 4 , 46
Z 15 0 1
500mA
M9 2 _ 3. 3 V S
1 4, 1 6
R 55 8
* 10 0 K _ 0 4_ + U
.
L6 1
*H C B 1 6 0 8K F -1 21 T 2 5 _0 6 _ + U
Q 53
* A O 3 4 0 9_ + U
G
D
S
P R 2 1 3
*1 0 K _ 04 _ + U
GND
M 92 -S 2
U 37 E
P C I E _ V S S # 1
A A 2 7
P C I E _ V S S # 1 0
A F 3 2
P C I E _ V S S # 1 1
A G 2 7
P C I E _ V S S # 1 2
A H 3 2
P C I E _ V S S # 1 3
K 2 8
P C I E _ V S S # 1 4
K 3 2
P C I E _ V S S # 1 5
L 2 7
P C I E _ V S S # 1 6
M 3 2
P C I E _ V S S # 1 7
N 2 5
P C I E _ V S S # 1 8
N 2 7
P C I E _ V S S # 1 9
P 2 5
P C I E _ V S S # 2
A B 2 4
P C I E _ V S S # 2 0
P 3 2
P C I E _ V S S # 2 1
R 2 7
P C I E _ V S S # 2 2
T 2 5
P C I E _ V S S # 2 3
T 3 2
P C I E _ V S S # 2 4
U 2 5
P C I E _ V S S # 2 5
U 2 7
P C I E _ V S S # 2 6
V 3 2
P C I E _ V S S # 2 7
W 2 5
P C I E _ V S S # 2 8
W 2 6
P C I E _ V S S # 2 9
W 2 7
P C I E _ V S S # 3
A B 3 2
P C I E _ V S S # 3 0
Y 2 5
P C I E _ V S S # 3 1
Y 3 2
P C I E _ V S S # 4
A C 2 4
P C I E _ V S S # 5
A C 2 6
P C I E _ V S S # 6
A C 2 7
P C I E _ V S S # 7
A D 2 5
P C I E _ V S S # 8
A D 3 2
P C I E _ V S S # 9
A E 2 7
V S S _ ME C H # 1
A 32
V S S _ ME C H # 2
A M1
V S S _ ME C H # 3
A M3 2
GN D # 1
A 3
G N D #1 0
A D 8
G N D #1 1
A E 7
G N D #1 2
A G 1 2
G N D #1 3
A H 1 0
G N D #1 4
A H 2 8
G N D #1 5
B 10
G N D #1 6
B 12
G N D #1 7
B 14
G N D #1 8
B 16
G N D #1 9
B 18
GN D # 2
A 30
G N D #2 0
B 20
G N D #2 1
B 22
G N D #2 2
B 24
G N D #2 3
B 26
G N D #2 4
B 6
G N D #2 5
B 8
G N D #2 6
C 1
G N D #2 7
C 3 2
G N D #2 8
E 28
G N D #2 9
F 10
GN D # 3
A A 1 3
G N D #3 0
F 12
G N D #3 1
F 14
G N D #3 2
F 16
G N D #3 3
F 18
G N D #3 4
F 2
G N D #3 5
F 20
G N D #3 6
F 22
G N D #3 7
F 24
G N D #3 8
F 26
G N D #3 9
F 6
GN D # 4
A A 1 6
G N D #4 0
F 8
G N D #4 1
G 1 0
G N D #4 2
G 2 7
G N D #4 3
G 3 1
G N D #4 4
G 8
G N D #4 5
H 1 4
G N D #4 6
H 1 7
G N D #4 7
H 2
G N D #4 8
H 2 0
G N D #4 9
H 6
GN D # 5
A B 1 0
G N D #5 0
J 2 7
G N D #5 1
J 3 1
G N D #5 2
K 11
G N D #5 3
K 2
G N D #5 4
K 22
G N D #5 5
K 6
G N D # 5 6
M 6
G N D # 5 7
N 1 1
G N D # 5 8
N 1 2
G N D # 5 9
N 1 3
GN D # 6
A B 1 5
G N D # 6 0
N 1 6
G N D # 6 1
N 1 8
G N D # 6 2
N 2 1
G N D # 6 3
P 6
G N D # 6 4
P 9
G N D # 6 5
R 1 2
G N D # 6 6
R 1 5
G N D # 6 7
R 1 7
G N D # 6 8
R 2 0
G N D # 6 9
T 1 3
GN D # 7
A B 6
G N D # 7 0
T 1 6
G N D # 7 1
T 1 8
G N D # 7 2
T 2 1
G N D # 7 3
T 6
G N D # 7 4
U 1 5
G N D # 7 5
U 1 7
G N D # 7 6
U 2 0
G N D # 7 7
U 9
G N D # 7 8
V 1 3
GN D # 8
A C 9
G N D # 7 9
V 1 6
G N D # 8 0
V 1 8
G N D # 8 1
Y 1 0
G N D # 8 2
Y 1 5
G N D # 8 3
Y 1 7
G N D # 8 4
Y 2 0
GN D # 9
A D 6
G N D #8 5
T 1 1
G N D #8 6
R 1 1
C 69 5
* . 22 U _ 10 V _ X 5 R _ 0 4 _+ U
+
C 6 7 9
* 1 00 U _ 6. 3 V _ B 2 _ + U
R 56 3
* 2K _ 1 % _ 0 4_ + U
C 6 7 8
* . 1 U _ 1 6 V _ 0 4_ + U
C 6 9 6
*1 U _6 . 3 V _ 0 4 _ +H
C 67 4
*4 . 7 U _ 6. 3 V _ 0 6 _ +U
R 56 2
* 1. 2 7 K _ 1 % _0 4 _ + U
------------>
P
CI EX
PRE
S
S IN
TERF
ACE
CLOCK
CALIBRATION
M 9 2 - S 2
U 3 7 A
N C _ P W R G O O D
N 1 0
P C I E _ C A L R N
A A 2 2
P C I E _ C A L R P
Y 2 2
P C I E _ R E F C L K N
A K 3 2
P C I E _ R E F C L K P
A K 3 0
P C I E _ R X 0 N
A E 3 1
P C I E _ R X 0 P
A F 3 0
P C I E _ R X 1 0 N
R 3 1
P C I E _ R X 1 0 P
T 3 0
P C I E _ R X 1 1 N
P 2 8
P C I E _ R X 1 1 P
R 2 9
P C I E _ R X 1 2 N
N 3 1
P C I E _ R X 1 2 P
P 3 0
P C I E _ R X 1 3 N
M2 8
P C I E _ R X 1 3 P
N 2 9
P C I E _ R X 1 4 N
L 3 1
P C I E _ R X 1 4 P
M3 0
P C I E _ R X 1 5 N
K 3 0
P C I E _ R X 1 5 P
L 2 9
P C I E _ R X 1 N
A D 2 8
P C I E _ R X 1 P
A E 2 9
P C I E _ R X 2 N
A C 3 1
P C I E _ R X 2 P
A D 3 0
P C I E _ R X 3 N
A B 2 8
P C I E _ R X 3 P
A C 2 9
P C I E _ R X 4 N
A A 3 1
P C I E _ R X 4 P
A B 3 0
P C I E _ R X 5 N
Y 2 8
P C I E _ R X 5 P
A A 2 9
P C I E _ R X 6 N
W 3 1
P C I E _ R X 6 P
Y 3 0
P C I E _ R X 7 N
V 2 8
P C I E _ R X 7 P
W 2 9
P C I E _ R X 8 N
U 3 1
P C I E _ R X 8 P
V 3 0
P C I E _ R X 9 N
T 2 8
P C I E _ R X 9 P
U 2 9
P E R S T B
A L 2 7
P C I E _T X 0 N
A G 3 1
P C I E _ TX 0 P
A H 3 0
P C I E _ TX 1 0 N
U 2 3
P C I E _ T X1 0 P
U 2 4
P C I E _ TX 1 1 N
T2 7
P C I E _ T X1 1 P
T2 6
P C I E _ TX 1 2 N
T2 3
P C I E _ T X1 2 P
T2 4
P C I E _ TX 1 3 N
P 2 6
P C I E _ T X1 3 P
P 2 7
P C I E _ TX 1 4 N
P 2 3
P C I E _ T X1 4 P
P 2 4
P C I E _ TX 1 5 N
N 2 6
P C I E _ T X1 5 P
M2 7
P C I E _T X 1 N
A F 2 8
P C I E _ TX 1 P
A G 2 9
P C I E _T X 2 N
A F 2 6
P C I E _ TX 2 P
A F 2 7
P C I E _T X 3 N
A D 2 6
P C I E _ TX 3 P
A D 2 7
P C I E _T X 4 N
A B 2 5
P C I E _ TX 4 P
A C 2 5
P C I E _T X 5 N
Y 2 4
P C I E _ TX 5 P
Y 2 3
P C I E _T X 6 N
A B 2 6
P C I E _ TX 6 P
A B 2 7
P C I E _T X 7 N
Y 2 6
P C I E _ TX 7 P
Y 2 7
P C I E _T X 8 N
W 2 3
P C I E _ TX 8 P
W 2 4
P C I E _T X 9 N
U 2 6
P C I E _ TX 9 P
V 2 7
Q 55
*M T N 7 0 0 2 Z H S 3 _ + U
G
D
S
Q 5 4
* MT N 70 0 2 Z H S 3_ + U
G
D
S
R 56 0
* 1M _ 04 _ + U
R 5 57
* 2 0K _0 4 _ + U
R 5 6 1
* 0 _0 4 _ + U
C 68 2
*4 . 7 U _6 . 3 V _ 0 6 _ +U
C 6 9 4
*1 0 U _1 0 V _ 0 8 _+ U
U 3 8
*7 4 A H C 1 G 0 8 G W _ +H
1
2
5
4
3
R 5 6 4
* 0 _ 04 _ + U
1 . 1 V _ 1 . 0 V _ P W R
3 . 3 V
M9 2 _ 3. 3V S
3 . 3 V S
V G A _ 3 . 3 V S
M9 2 _ 3. 3 V S
V GA _ P E X C L K
21
V GA _ P E X C L K #
21
P E R S T B #
d G P U _ H O L D _ R S T #
2 5
P L T_ R S T #
2 4 , 3 0
S U S B
3 7
d G P U _ P W R _ E N #
1 9 , 2 5 , 44
P E X_ R X 2#
P E X _ R X4
P E X_ R X 1#
P E X_ R X 6#
P E X_ R X 5#
P E X _ R X7
P E X_ R X 4#
P E X _ R X3
P E X _ R X6
P E X_ R X 0#
P E X_ R X 7#
P E X _ R X5
P E X_ R X 3#
P E X _ R X1
P E X _ R X0
P E X _ R X2
C 6 8 6
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 9 2
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 7 6
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 7 5
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
100-MHz (? 00 ppm) input frequency.
A stable PCI Express reference clock must be provided
less than 400 ns after CLKREQ# is asserted. The
reference clock can be disabled whenever CLKREQ#
is deasserted.
C 6 9 3
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 7
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 5
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 8
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 1
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 3
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 4
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 0
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 8 9
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 7 7
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 9 1
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
C 6 9 0
*. 1 U _ 10 V _ X 7 R _ 0 4 _+ U
P E G _ R X# 4 3
P E G _ R X# 7 3
P E G _ R X# 0 3
P E G_ R X 5 3
P E G_ R X 2 3
P E G_ R X 3 3
P E G_ R X 4 3
P E G _ R X# 1 3
P E G_ R X 7 3
M92_3.3VS
P E G _ R X# 6 3
P E G _ R X# 2 3
P E G_ R X 1 3
P E G_ R X 6 3
P E G _ R X# 3 3
P E G _ R X# 5 3
P E G_ R X 0 3
N V _ P W R _ C L
2 kO (1% tolerance) to PCIE_VDDC.
Connected to PCIE_VSS (ground) through a 1.27-kO
(1%) resistor.
V G A _ 3 . 3 V S 1 4 , 1 9
Sheet 13 of 55
M92 S2 PCIE
Interface
Summary of Contents for M770CU
Page 1: ......
Page 2: ......
Page 3: ...Preface I Preface Notebook Computer M770CU M775CU W760CU W765CU Service Manual...
Page 24: ...Introduction 1 12 1 Introduction...
Page 46: ...Disassembly 2 22 2 Disassembly...
Page 54: ...Part Lists A 8 LCD M770CU M775CU A Part Lists LCD M770CU M775CU Figure A 6 LCD M770CU M775CU...
Page 62: ...Part Lists A 16 LCD W760CU W765CU A Part Lists LCD W760CU W765CU Figure A 14 LCD W760CU W765CU...