XETK-V1.0 - User’s Guide
15
ETAS
Introduction
3.2
Features
• High speed measurement and calibration performance
– Performance similar to appropriate ETK
– Hardware synchronization and time stamping
– Supports fast measurement rasters
• Vertical interface
– Small form factor
– Short signal lines for minimal impedance
– Supports all Freescale MPC5500 microcontroller
– Applicable for an external Freescale 16-bit microcontroller bus
– Supports 16- and 8-bit access to the data emulation memory
• Measurement interface
– Adress-/data bus and
– Nexus (JTAG)
• Measurement memory
– Two pages of data emulation/measurement data memory available,
each with 1 MByte
– Permanent storage of emulation data in flash memory
– RAM adaptor mode
– CPU bus interface voltage 2.5 V/ 3.3 V/ auto sense option
• Trigger interface
– Trigger direct measurement (TDM)
– 48 hardware trigger
– 4 trigger generated by internal timer via Nexus (JTAG)
– 64 measurement raster
• XCP protocol on Fast Ethernet interface
– Direct connection to PC
– Supports a variety of standard applications
• Debugger interface
– Arbitration possible with power trace
– Second Nexus (JTAG) compliant Mictor connector for external debug
hardware
– ECU flashing via ETK
– Braindead flashing under ProF control
• Can drive "Boot configuration" to configure the CPU
• Permanent storage of configuration in Flash
• Configurable ETK chip select
• Enable or disable the ETK by ECU software
• Firmware update (programming of the logic device) through software
HSP; removal of XETK or ECU not necessary