PB1650PRT1.1 Prototyping Piggyback
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The PB1650PRT1.1 Prototyping Piggyback is normally used with the ES4060.1
Processor Module. The processor module makes a range of I/O, PWM and A/D
channels, and various interfaces such as SPI, CAN, JTAG etc. available. These
can be addressed using the VMEbus or CAN interface. For more information
on programming the interfaces and peripheral units as well as on data
exchange using the VMEbus and the CAN interface, please refer to the
firmware manual on the ES4060.1 Processor Module.
The block diagram below illustrates the working principle of the
PB1650PRT1.1 Piggyback.
Fig. 7-1
PB1650PRT1.1 Block Diagram
At the top of the diagram you can see the X1 connector and the inputs and
outputs of the ES1650.1 Piggyback Carrier Board. If you develop circuits with
the ES4060.1 Processor Module, the signals are transferred to the VMEbus
interface on the carrier board via the processor module and the Dual-Ported
RAM (DPRAM).
Configuration data for the processor module and user-specific data are stored
in the Flash memory.
The wrap area is available for constructing individual circuits.
Both the wrap area and the ES4060.1 Processor Module have common
connections to the carrier board’s front-facing connector, X1.
Wrap Area
DPRAM
ES1650.1
FLASH
Inputs/Outputs 1-50
(ES1650.1 X1)
Data
Address and
Control Signals
Processor Module
ES4060.1
(Optional)
Summary of Contents for ES1650.1
Page 1: ...ES1650 1 Piggyback Carrier Board User s Guide ...
Page 10: ...Introduction 10 ...
Page 20: ...20 Physical Dimensions Circuit board 100 x 160 mm Front panel Height 3 U Width 4 HP 20 3 mm ...
Page 45: ...45 Physical Dimensions Length 100 mm Width 48 mm Depth 12 mm ...
Page 46: ...46 ...
Page 64: ...PB1650PRT1 1 Prototyping Piggyback 64 ...
Page 82: ...82 ...