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Espressif Systems
ESP8266EX
Hardware User Guide
The first layer is the TOP layer, signal lines and components are placed on the top of the printed
circuit board;
The second layer is the GND layer, no signal lines is laid so as to ensure an entire plain GND plane;
The third layer is the POWER layer, only power lines can be placed on this layer. However, there is
exceptional cases. When there is no other choice but to place some signal lines on this layer, it is
acceptable.
The forth layer is the BOTTOM layer, only signal lines are designed on this layer, no components
shall be placed on this layer.
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On design of the power-supply part
The power supply voltage of those signal lines highlighted in yellow is 3.3V. The total width of the
power line shall be larger than 15 mil.
Before the power line reaches the analog power-supply pins (including Pin 1, 3, 4, 28, 29) of
ESP8266EX, a 10uF capacitor with 0603 or 0805 package needs to be added, as is illustrated in Fig.
10. C6, which is the capacitor, should be placed adjacent to the analog power-supply pins of the
chipset.
Power lines should be placed on the third layer. When the power lines reached the pins of the
chipset, VIAs are needed so that the power lines can go through the layers to connect the pins of the
chipset on the TOP layer. The diameter of the VIA holes should exceed the width of power lines,
while the drill should be appropriate, a little bit larger than the radius of VIA is enough.
Espressif Systems
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Jun 1, 2015
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