Technical Data
Page 22 of 28
Hardware Manual Doc.-Nr.: E.1108.21 /Rev. 1.0
ECS-CPCIs/FPGA
Number
1
Standard
PCI Express Specification R1.0a
Lanes
1
Mode
Device
Controller
Integrated in FPGA (Hard IP)
Table 10:
Data of PCI Express Interface
Number
1
Type
Texas Instruments TMP100
Accuracy / Resolution ±2.0°C from -25°C to 85°C / 9Bit
Interface
I
2
C
Controller
Integrated in FPGA
Table 11:
Data of the temperature sensor
Number
1 Chain
Standard
IEEE1149.1
Topology
There are two devices in the chain: FPGA and Security PLD.
Devices which are not equipped are bridged with zero-ohm resistors.
Purpose
FPGA debugging, Boundary Scan factory testing, initial FPGA
programming
Controller
Integrated in the devices
Connector
X1300 - Samtec RSM-106-02-T-S
Table 12:
Data of JTAG interface
Serial number
distribution
The serial number is read and distributed by the software driver.
Hardware ID
distribution
The hardware ID is readable via a FPGA register.
See “EtherCAT Slave Stack” manual for further information
Table 13:
Hardware ID and serial number
4.7 PCI Express Interface
4.8 Temperature Sensor
4.9 JTAG Interface
4.10 Hardware ID and Serial Number