BRU3 LOGIC AND RADIO SYSTEM
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BRU3 MANUAL, Doc.no: 155 16-ANNA 805 08 Uen, Rev H, 2003-02-07
5.4
Signal Processor Unit with Memory
The TMS320C25 Signal processor unit is used for modulation, demodulation
and radio control. The SPU contains an 8 kbit * 16 SRAM with 25 ns access
time. No EPROM or FLASH is included. The BOOT program is loaded to the
dual port memory by the main CPU.
5.5
Console Ports
The FCB contains two ports for serial communication, both handled by the
integrated circuit Z16C35.
Port A implies complete synchronous functionality, and also, limited modem
support. By the FNB and FMB, this port can be used for V.24/V.28, V.24/V.11
or V.24/V.32.
Port B is intended for the use of a console via the FNB with the V.24 signals,
RX and TX.
5.6
LEDs
LED
Colour
Function
Status indicator
Yellow
Lit when the processor is operating OK.
Watchdog alarm
Red
Lit when the Watchdog is released. If so, a reset
pulse is generated. The Watchdog LED is lit and the
signal WDSTATUS, read by the CPU, peaks.
