Ericsson 19D902783G1, Maintenance Manual, Page: 27 / 92

TROUBLESHOOTING CHART
SYMPTOM AREAS TO CHECK INDICATIONS
I. Loop Fails To Lock 1. Check for:
+8 Vdc at U16-3,
+5 Vdc at U15-3
+8 Vdc at Q8-C.
2. Check for 12.8 MHz
reference at U6-2 and U6-3.
Typical Levels:
500 mVpp @U6-2
2.5 Vpp @U6-3.
3. Check for LO output @J2.
F
LO
±
5 MHz, 0 dBm nominal
4. Check Prescaler output @U5-4.
Typically: 2-4 MHz square wave
@1.25 Vpp.
5. Check for CLOCK, DATA,
and ENABLE signals at U6
pins 11, 12 and 13 respectively.
(0, 8V logic levels)
6. Check Ramp Signal @U6-15.
It should be 6.25 kHz nominal.
Bad Regulation circuitry.
Troubleshooting using
standard procedures.
Reference Osc. Module defective or supply
not present or low. Proceed to reference
oscillator section II.
LO tuning incorrect, or buffer amplifier bad.
Proceed to LO tuning and power section III.
If LO power is good, check for 3.2 Vdc
@U2-3. Replace U2, then U5 if necessary.
Bad digital control circuitry.
Troubleshoot using standard procedures.
Ensure all programming signals are present
at J1. (CLOCK, DATA, ENABLE, A0, A1
and A2).
If reference oscillator and programming
signals are present for proper programming
information. Last resort - replace
Synthesizer IC U6.
II. Reference OSC. not present or
low power.
1. Check for 4.3 Vdc supply at
junction of R5 and C41.
2. Check 12.8 MHz signal @Q13-E.
Should be approx. 350 mVpp.
Bad supply switch Q2 or wrong
Control Signal Internal Osc.
Troubleshooting using standard procedures.
Replace Y1 as last resort.
Bad buffer amplifier Q13.
Troubleshoot using standard procedures.
III. LO power low or
tuned out of band.
1. Check tuning with 6 Vdc applied
using test procedure. F
LO
±
5 MHz.
2. Check DC bias at Buffer
Amplifiers U1, U2, & U3 pin 3
Typ. 3.2 Vdc.
LO tuning incorrect. Retune following
test procedure.
Bad Buffer Amplifier. Replace bad part.
IV. LO signal not present.
(i.e. Q1 does not oscillate)
1. Check DC bias at Q1 drain.
(Typ. +8Vdc).
2. Check DC bias at Q1 source.
(Typ. +0.9 Vdc).
Replace Q1.
LBI-38672J
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