Ercogener GenLoc 41e, User Manual

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EG_GenLoc41e_1055_UG_003_UK Page 60 / 71
Descriptions and non-contractual illustrations in this document are given as an indication only.
ERCOGENER reserves the right to make any modifications.
Dct_427_02
The integrator has the responsibility to protect the input from electric disturbances and to
respect the values of the functioning parameters.
8.2.4.6 Bus One Wire (0 - 3.3V) on INPUT3
As an option on the GenLoc 41e, it is possible to have an input Bus One Wire instead of the opto-coupled
input I3.
The bus is managed by the ARM.
Table: Electric characteristics of the ARM
Internal electric scheme of the bus One Wire
This input E3 is directly connected on the ARM. Port PA2.
The selection of the direction (Input/Output) is done by software.
Assembly working with identification keys type DS1990 i-button of the manufacturer MAXIM.
The integrator has the responsibility to protect the input from electric disturbances and to
respect the values of the functioning parameters.
Characteristics Symbols Conditions Min. Typ. Max. Unit
Input Voltage
– Low
V
IL
-0.3 0.8 V
dc
Input Voltage
– High
V
IH
2 3.5 V
dc
Hysteresis Voltage V
Hys
0.4 0.7 V
dc
Input Leakage Current I
LEAK
-4 38 µA
dc
Input capacitance C
IN
14 pF
Output Low-level Voltage V
OL
0.4 V
dc
Output High-level Voltage V
OH
2.8 V
dc
Output Current I
o
±16 mA
DC