7. Connection with Main CPU
8
EPSON
S1R72U06 Evaluation Board Manual
(Rev.1.0)
7. Connection with Main CPU
7.1
Main CPU Connection Signal
This board can be connected to the main CPU via CN9.
The interface with the main CPU uses the S1R72U06 SIO (UART/SPI) function.
For more information on the SIO function, refer to the
S1R72U06 Technical Manual
.
CN9 signal
I/O
Signal description
Main CPU connected to
MISO
Tri
Serial data output
Rx (in UART mode)
MISO (in SPI mode)
MOSI
I
Serial data input
Tx (in UART mode)
MOSI (in SPI mode)
SCK
I
Serial clock input
SCK (in SPI mode)
SS
I
Slave select input
CS (in UART mode)
SS (in SPI mode)
XIRQ_EVENT
O
Event read request output
General input port (GPI)
XIRQ_STATUS O
Status
notification output
General input port (GPI)
SIO_READY
O
Transmission start ready notification output
General input port (GPI)
CLKOUT
O
Clock output
Clock input
HOSTxDEVICE
I
Host/Device mode setting input (S1R72U06 is reset
when settings are switched)
General output port
(GPO)
WAKEUP
I
Wakeup input (Wakeup triggered at rising edge)
General output port
(GPO)
Note: I/O Tri means that three states (H level, L level, and Hi-Z) are possible.
Note: The
input/output
levels for each signal will be the CVDD levels for S1R72U06.
Note: The SS signal can be used for MISO pin output control in UART mode. It should be fixed to Low when
Hi-z output is not required. (For more information on the SS signal, refer to the
S1R72U06 Data Sheet.
)
Summary of Contents for S1R72U06
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