RX8111CE
Page
−
24
ETM61E-01
14.2. Wake-up Timer Interrupt Function
The wake-up timer interrupt function generates an interrupt event periodically at any fixed cycle set between 244.14
s
and 31.9
years. This function can stop at one time and is available as an accumulative timer.
After the interrupt occurs, the /INT status is automatically cleared .
14.2.1. Related registers for function of wake-up timer interrupt function
Table 16 Wake-up interrupt timer register
Address
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
1Ah
Timer Counter 0
128
64
32
16
8
4
2
1
1Bh
Timer Counter 1
32768
16384
8192
4096
2048
1024
512
256
1Ch
Timer Counter 2
8388608
4194304
2097152
1048576
524288
262144 131072 65536
1Dh
Extension Register
FSEL1 FSEL0
USEL
TE
WADA
ETS
TSEL1 TSEL0
1Eh
Flag Register
POR
z
UF
TF
AF
EVF
VLF
XST
1Fh
Control Register
z
z
UIE
TIE
AIE
EIE
z
STOP
2Dh
Timer Control
z
z
z
z
TBKON
TBKE
TMPIN
TSTP
Before entering operation settings, we recommend
first clearing the TE bit to "0"
.
When the fixed-cycle timer function is not being used, the fixed-cycle Timer Counter0,1 register can be used as a RAM register. In
such cases, stop the fixed-cycle timer function by writing "0" to the TE and TIE bits.
1) Down counter for wake-up interrupt timer Timer Counter 2, 1, 0
This register is used to set the default (preset) value for the counter. Any count value from 1
(000001h)
to 16777216
(FFFFFFh)
can
be set.
Be sure to write "0" to the TE bit before writing the preset value.
When TE = 0, read out data of timer counter is default (Preset) value. And when TE = 1, read out data of timer counter is just
counting value. But, when access to timer counter data, counting value is not held.
Therefore, for example, perform twice read access to obtain right data, and a way to adopt the case that two data accorded is
necessary.
2) TSEL1, TESL0 bit
This combination decides the source clock of count down period.
The source clock selection should
be done after TE bit setting to “0”.
Table 17 TSEL bit, selection of source clock
TSEL1
(bit 1)
TSEL0
(bit 0)
Source clock
Auto reset time
(tRTN)
0
0
4096
Hz
Once per
244.14
s
122
s
0
1
64
Hz
Once per 15.625
ms
7.813
ms
1
0
1
Hz
Once per
1 second
7.813
ms
1
1
1/60 Hz
Once per minute
7.813
ms
The /INT pin's auto reset time (tRTN) varies as shown above according to the source clock setting.
The first countdown shortens than a source clock.
The example of the error of the first countdown: A value to preset is 0004h
Cycle error
TE
Designed cycle
正しい周期
Inner source clock
TF bit
”0”
⇒
“1”
TF
3
2
1
4
Down counter
4
Figure 18 Wake-up timer initial sequence (cycle error)
