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Page-11

Register description

1. Timing registers

(1) S

1

to Y

10

registers

These registers are 4-bit, positive logic registers in which the digits of the year, month, day, hour, minute, and second
are continuously written in BCD code.
For example, when(1, 0, 0, 1) has been written to the bits of the S

1

register, the current value in the S

1

register is 9. As

described previously, data is handled by 4-bit BCD codes. Therefore, the S

1

to Y

10

registers consist of units registers

and tens registers.
When seconds are read, for example, the values in the S

1

and S

10

registers are both read out to give the total number

of seconds.

(2) W register

The W register is a counter that increments each time the day digits are incremented. It counts from 0 to 6. Since the
value in the counter bears no relationship to the day of the week, the user can choose the coding that relates the
counter value to the day of the week. The following is just one example of this relationship;

(3) H

10

register (PM/AM, h

20

, h

10

)

The H

10

register contains a combination of the 10-hours digit bits and the PM/AM bit. Therefore, the contents of this

register will depend on whether the 12-hour clock or 24-hour clock is selected. If the 12-hour clock is selected, the user
must bear in mind that this register will contain two types of data: 10-hour data in the h

10

bit and a.m./p.m. data in the

PM/AM bit. The PM/AM bit is 0 for a.m. and 1 for p.m.
For example, if a value of 48 is obtained from the H

10

and H

1

registers when the H

10

, H

1

, M

10

, and M

1

registers are read,

remember that the inclusion of a set PM/AM bit (PM/AM=1) will make the tens digit appear to be 4. Since this bit is 1,
the time is p.m. If the value read from the M

10

and M1 registers is 00, the actual time should be read as 8:00 p.m.

Similarly, if the value read from the H

10

and H

1

registers is 11, the PM/AM bit is 0, and so this time is therefore a.m. If

the value read from the M

10

and M1 registers is 30, this time should be read as 11:30 a.m.

When the 12-hour clock is used, the h

20

bit should never be 1, but it is nonetheless physically possible to write a 1 in

this bit. The user should be careful to write a 0, to avoid unpredictable consequences. Note that, if a mistake in the
PM/AM value is made while in 12-hour-clock mode, the date digits will be half a day out. Correct setting is needed.
If the 24-hour clock is selected, the PM/AM bit will always be 0.
For details of how to set 12-hour or 24-hour clock, see the section on the 24/12 bit on page 15.

(4) Y

1

and Y

10

registers

The Y

1

and Y

10

registers can handle the last two digits of the year in the Gregorian

calendar. Leap years are automatically identified, and this affects the handling of the
month and day digits for February 29.
[Leap years]
In general, a year contains 365 days. However, the Earth takes slightly longer than
exactly 365 days to rotate around the sun, so we need to set leap years in
compensation. A leap year occurs once every four years, in years in the Gregorian
calendar that are divisible by four. However, a further small correction is necessary in
that years that are divisible by 100 are ordinary years, but years that are further
divisible by 400 are leap years.
The main leap and ordinary years since 1900 and into the future are listed on the right.

[Leap years in the RTC-72421/72423]
To identify leap years, the RTC-72421/RTC-72423 checks whether or not the year
digits are divisible by four. As implied above, 2000 will be a leap year, and so no further
correction will be necessary in that case.
This process identifies the following years as leap years:

96, (20)00, (20)04, (20)08, (20)12...

The turn-of-the-century years for which the RTC-72421/RTC-72423 will require a
correction are shown shaded in the table on the right.
If Japanese-era years are set, accurate leap-year identification will only be possible if
the era years that are divisible by four are actually leap years. As it happens, years in
the current era, Heisei, that are divisible by four are leap years, which means that
Heisei years can be set in these registers.

(5) Out-of-range data

If an impossible date or time is set, this may cause errors. If such a date is set, the behavior of the device is in general
unpredictable, so make sure that impossible data is not set.

g

n

i

t

t

e

S

s

e

m

i

t

e

l

b

i

s

s

o

P

k

c

o

l

c

r

u

o

h

-

2

1

.

m

.

p

d

n

a

.

m

.

a

,

9

5

:

1

1

o

t

0

0

:

2

1

k

c

o

l

c

r

u

o

h

-

4

2

9

5

:

3

2

o

t

0

0

:

0

0

t

n

u

o

C

0

1

2

3

4

5

6

y

a

D

y

a

d

n

u

S

y

a

d

n

o

M

y

a

d

s

e

u

T

y

a

d

s

e

n

d

e

W

y

a

d

s

r

u

h

T

y

a

d

i

r

F

y

a

d

r

u

t

a

S

d

n

a

s

r

a

e

y

p

a

e

l

l

a

u

t

c

A

s

r

a

e

y

y

r

a

n

i

d

r

o

r

a

e

Y

r

a

e

y

p

a

e

L

y

r

a

n

i

d

r

O

r

a

e

y

0

0

9

1

O

:

3

9

9

1

O

4

9

9

1

O

5

9

9

1

O

6

9

9

1

O

7

9

9

1

O

8

9

9

1

O

9

9

9

1

O

0

0

0

2

O

1

0

0

2

O

2

0

0

2

O

3

0

0

2

O

4

0

0

2

O

5

0

0

2

O

:

0

0

1

2

O

0

0

2

2

O

0

0

3

2

O

0

0

4

2

O

:

Summary of Contents for RTC-72421 A

Page 1: ...Real Time Clock Module Application Manual MQ162 01 RTC 72421 72423 ...

Page 2: ...llectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party This material of portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Contro...

Page 3: ...tting the fixed period pulse output mode and fixed period interrupt mode 10 5 Resetting the fixed period pulse output mode and fixed period interrupt mode 10 Register description 11 1 Timing registers 11 1 S1 to Y10 registers 11 2 W register 11 3 H10 register PM AM h20 h10 11 4 Y1 and Y10 registers 11 5 Out of range data 11 2 CD register control register D 12 1 HOLD bit D0 12 2 BUSY bit D1 12 3 IR...

Page 4: ... Connection to 68 series MPU 20 Reference data 21 1 Frequency temperature characteristics typical 21 2 Frequency voltage characteristics typical 21 3 Current consumption voltage characteristics typical 21 External dimensions 22 1 RTC 72421 22 2 RTC 72423 22 Marking layout 22 Application notes 23 1 Notes on handling 23 1 Static electricity 22 2 Noise 22 3 Voltage levels of input pins 22 4 Treatment...

Page 5: ...ited for applications requiring timing management such as personal computers dedicated wordprocessors fax machines multi function telephones and sequencers Built in crystal unit removes need for adjustment and reduces installation costs Use of C MOS IC enables low current consumption 5µA max at VDD 2 0V Compatibility with Intel CPU bus Address latch enable ALE pin compatible with multiplex bus CPU...

Page 6: ...23 Block diagram Pin connections RTC 72421 RTC 72423 The VDD pins are at the same electrical level as VDD Do not connect these pins externally The N C pins are not connected internally Ground them in order to prevent noise ...

Page 7: ...en the RTC is connected to a multiplexed bus type of CPU CS0 requires the operation of the ALE see the description of the ALE Use CS1 connected to a power voltage detection circuit When CS1 is high the RTC is enabled when it is low the RTC is on standby When CS1 goes low the HOLD and RESET bits in the RTC registers are cleared to 0 This is an N channel open drain output pin Depending on the settin...

Page 8: ... 5 p y t 0 1 x a m 0 1 µA I D D 2 V D D V 0 2 p y t 9 0 x a m 5 m e t I l o b m y S n o i t i d n o C s n o i t a c i f i c e p S t i n U e g a t l o v y l p p u S V D D 5 5 o t 5 4 V e r u t a r e p m e t g n i t a r e p O T R P O 1 2 4 2 7 C T R 0 7 o t 0 1 C 3 2 4 2 7 C T R 5 8 o t 0 4 e g a t l o v d l o h a t a D V H D 5 5 o t 0 2 V S C 1 e m i t d l o h a t a d t R D C a t a d n o n o i t c ...

Page 9: ...a k a e l t u p n I I 1 K L VI V D D 0 V D r o f t p e c x e s n i p t u p n I 0 D o t 3 1 1 µA 2 t n e r r u c e g a k a e l t u p n I I 2 K L D0 D o t 3 0 1 0 1 1 e g a t l o v t u p t u o w o L V 1 L O I L O A m 5 2 4 0 V e g a t l o v t u p t u o h g i H V H O I H O 0 0 4 µA 4 2 2 e g a t l o v t u p t u o w o L V 2 L O I L O A m 5 2 P D T S 4 0 t n e r r u c e g a k a e l e t a t s f f O I K ...

Page 10: ... t a D t V Z P Q R F p 0 5 1 L C 0 2 1 d a e r r e t f a e m i t r e f s n a r t g n i t a o l f t u p t u o a t a D t Z V P Q R 0 0 7 S C 1 e m i t d l o h tH S C 1 0 0 2 e m i t y r e v o c e r d a e R t C E R W 0 0 0 1 m e t I l o b m y S n o i t i d n o C N I M X A M t i n U S C 1 e m i t p u t e s t U S S C 1 0 0 0 1 s n E L A e r o f e b e m i t p u t e s s s e r d d A t U S E L A A 0 5 E L ...

Page 11: ...Page 7 1 Write mode 2 Read mode ...

Page 12: ...t i r w e r o f e b e m i t p u t e s t u p n i a t a D t U S W D 0 8 e t i r w r e t f a e m i t d l o h a t a D tH D W 0 1 e m i t y r e v o c e r e t i r W t C E R W 0 0 2 m e t I l o b m y S n o i t i d n o C N I M X A M t i n U S C 1 e m i t p u t e s t U S S C 1 0 0 0 1 s n S C 1 e m i t d l o h tH S C 1 0 0 0 1 e t i r w e r o f e b e m i t p u t e s s s e r d d A t U S W A 0 5 e t i r w r ...

Page 13: ...0 4 s 0 2 s 0 1 s 5 0 r e t s i g e r t i g i d s d n o c e s 0 1 2 0 0 1 0 1 I M 8 i m 4 i m 2 i m 1 i m 9 0 r e t s i g e r t i g i d e t u n i m 1 3 0 0 1 1 0 1 I M 0 4 i m 0 2 i m 0 1 i m 5 0 r e t s i g e r t i g i d s e t u n i m 0 1 4 0 1 0 0 1 H 8 h 4 h 2 h 1 h 9 0 r e t s i g e r t i g i d r u o h 1 5 0 1 0 1 0 1 H M A M P 0 2 h 0 1 h 2 r o 1 0 r e t s i g e r t i g i d s r u o h 0 1 6 0 ...

Page 14: ...l b i c r o f Y S U B S e h t n i a t a d g n i s s e c c a n e h w t i b Y S U B e h t e s U 1 n o i t a t n e m e r c n i e h t g n i r u d 1 o t t e s s i t i b s i h T s r e t s i g e r W o t S e h t f o e l c y c 1 S e h t o t s s e c c a 1 s i t i b Y S U B e h t n e h W e s i w r e h t o 0 o t t e s s i d n a s r e t s i g e r W o t 1 W o t d e t i b i h n i s i s r e t s i g e r S e h t g ...

Page 15: ...tting is needed If the 24 hour clock is selected the PM AM bit will always be 0 For details of how to set 12 hour or 24 hour clock see the section on the 24 12 bit on page 15 4 Y1 and Y10 registers The Y1 and Y10 registers can handle the last two digits of the year in the Gregorian calendar Leap years are automatically identified and this affects the handling of the month and day digits for Februa...

Page 16: ...is an internal status bit that corresponds to the status of the STD P pin output to indicate whether or not an interrupt request has been issued to the CPU When the STD P pin output is low the IRQ FLAG bit is 1 when the STD P pin output is open circuit the IRQ FLAG bit is 0 When writing data to the CD register keep the IRQ FLAG bit at 1 except when deliberately writing 0 to it Writing 0 to the IRQ...

Page 17: ...and minutes digits as shown below If the minutes digits have been incremented an upward carry is propagated Example The correction caused by the 30 seconds ADJ bit sets the time within the RTC to 00 00 00 if it was within the range of 00 00 00 to 00 00 29 or to 00 01 00 if it was within the range of 00 00 30 to 00 00 59 ii Access inhibited after 30 seconds correction For 76 3 mseconds after 1 is w...

Page 18: ...ng for fixed period pulse output or fixed period interrupts ii STD P pin output control The timing of STD P pin output is at the incrementation of the period specified by the t0 and t1 bits t1 t0 y c n e u q e r f d o i r e P s k r a m e R 0 0 z H 4 6 d n o c e s 4 6 1 t u p t u o n i p P D T S e h t e d o m t u p t u o e s l u p d o i r e p d e x i f n I s m 5 2 1 8 7 r o f w o l s i s m 5 2 1 8 ...

Page 19: ...256 seconds counter The reset continues for as long as the RESET bit is 1 End the reset by writing 0 to the RESET bit If the level of the CS1 pin goes low the RESET bit is automatically cleared to 0 2 STOP bit D1 Writing 1 to the STOP bit stops the clock of the internal counter from the 1 8192 second bit onward Writing 0 to the STOP bit restarts the clock This function can be used to create a cumu...

Page 20: ...3 1 Power on procedure initialization When power is turned on the contents of all registers and the output from the STD P pin are undefined Therefore all the registers must be initialized after power on Follow the procedure given below for initialization ...

Page 21: ...Page 17 A Starting the count B Checking the status of the BUSY bit C Stopping and resetting the counter Wait 250 µs C Stopping and resetting the counter ...

Page 22: ...r registers S1 to W cannot be accessed for 76 3 mseconds after this write Therefore follow one of the procedures shown below to use this function or Note The crystal unit could be damaged if subjected to excessive shock If the crystal unit should stop operating for such a reason the timer within the RTC will stop While the crystal unit is operating the BUSY bit is automatically reset every 190 mse...

Page 23: ...te in which a voltage lower than the RTC s rated range of operating supply voltage is applied 4 5 V to 2 0 V Under this condition the timer continues to operate under battery back up power but the interface between the interior and exterior of the RTC cannot be guaranteed 2 Timing 3 Note If the RTC is operated with timing conditions different from those shown above data within the RTC could be ove...

Page 24: ...lly check the AC timings of both the RTC and the microprocessor 1 Connection to multiplexed bus type The resistors on the RD and WR lines are not necessary if the CPU does not have a HALT or HOLD state 2 Connection to Z80 or compatible CPU 3 Connection to 68 series MPU Select IORQ or MEMRQ depending on whether the RTC maps I O or memory of the CPU ...

Page 25: ...e characteristics can be approximated by the following equation fT ppm α θT θX 2 2 To determine the overall clock accuracy add the frequency tolerance and the voltage characteristics f f ppm f f0 fT fV 3 Finding the daily deviation Daily error f f x 10 6 x 86400 The clock error is one second per day at 11 574 ppm θT 25 C Typ α 0 035ppm C2 Typ 2 Frequency voltage characteristics typical 3 Current c...

Page 26: ...72421 2 RTC 72423 Unless otherwise stated all units are mm Note The illustration is a general representation of the content and location of information on the label and is not a detailed specification of the typeface size or positioning of printing used on the label ...

Page 27: ... placing any device that generates high levels of electronic noise near the RTC 72421 RTC 72423 module Do not connect signal lines to the RTC 72421 RTC 72423 module within the area shown hatched in the figure on the right and if possible embed this area in a GND land 3 Voltage levels of input pins Apply signal levels that are as close as possible to VDD and ground to all pins except the CS1 pin Mi...

Page 28: ...at these curves are as gentle as possible 2 Mounting equipment While this module can be used with general purpose mounting equipment the internal crystal unit may be damaged in some circumstances depending on the equipment and conditions Therefore you should confirm that the module will survive the mounting process that will be used before actually using this module in full scale production In add...

Page 29: ...l Berkshire RG12 8PE England Phone 41 0 1 344 381700 Fax 41 0 1 344 381701 Les Conquerants Immeuble Fujiyama L P 915 1 Avenue de l Atlantique Z A de Courtaboeuf 2 91976 Les Ulis Cedex Phone 33 0 1 64 86 23 50 Fax 33 0 1 64 86 23 55 V le F lli Casiraghi 427 20099 Sesto San Giovanni Milan ITALY Phone 39 2 262331 Fax 39 2 2440750 20 F Harbour Centre 25 Harbour Road Wanchai HONG KONG Phone 852 2585 46...

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