RA4803SA
Page - 6
ETM38E-03
8. Use Methods
8.1. Description of Registers
8.1.1. Write / Read and Bank Select
R/W and Register bank are specified by the four bits mode setting code.
Bank1: Basic time and calendar register.
Bank2: Extension register
… Adds 1/100s Counter.
Bank3: Extension register
… Capture buffer and Event control registers.
Mode
Bank 1
Bank 2
Bank 3
Read
9 h
A h
B h
Write
1 h
2 h
3 h
The register of the same name of Bank1 and Bank2 is the same register.
8.1.2. Register table (Bank1)
Address
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Read
Write
0
SEC
40
20
10
8
4
2
1
P
P
1
MIN
40
20
10
8
4
2
1
P
P
2
HOUR
20
10
8
4
2
1
P
P
3
WEEK
6
5
4
3
2
1
0
P
P
4
DAY
20
10
8
4
2
1
P
P
5
MONTH
10
8
4
2
1
P
P
6
YEAR
80
40
20
10
8
4
2
1
P
P
7
RAM
•
•
•
•
•
•
•
•
P
P
8
MIN Alarm
AE
40
20
10
8
4
2
1
P
P
9
HOUR Alarm
AE
•
20
10
8
4
2
1
P
P
A
WEEK Alarm
AE
6
5
4
3
2
1
0
P
P
DAY Alarm
•
20
10
8
4
2
1
B
Timer Counter 0
128
64
32
16
8
4
2
1
P
P
C
Timer Counter 1
•
•
•
•
2048
1024
512
256
P
P
D
Extension Register
TEST WADA USEL
TE
FSEL1 FSEL0 TSEL1 TSEL0
P
P
E
Flag Register
UF
TF
AF
EVF
VLF
VDET
P
P
F
Control Register
CSEL1 CSEL0 UIE
TIE
AIE
EIE
RESET
P
P
P : Possible , I : Impossible
Note
When after the initial power-up or when the result of read out the VLF bit is "1" , initialize all registers, before
using the module.
Be sure to avoid entering incorrect date and time data, as clock operations are not guaranteed when the data
or time data is incorrect.
∗
1)
During the initial power-up, the TEST bit is reset to "0"
and the VLF bit is set to "1".
∗
At this point, all other register values are undefined, so be sure to perform a reset before using the module.
∗
2)
Only a "0" can be written to the UF, TF, AF, VLF, or VDET bit.
∗
3)
Any bit marked with "
" should be used with a value of "0" after initialization.
∗
4)
Any bit marked with "
•
"
is a RAM bit that can be used to read or write any data.
∗
5)
The TEST bit is used by the manufacturer for testing. Be sure to set "0" for this bit when writing.
