EPOX EP-D3VA, User Manual, Page: 47 / 90

BIOS setup
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PCI Dynamic Bursting: When Enabled, data transfers on the PCI bus, where
possible, make use of the high-performance PCI bust protocol, in which graeater
amounts of data are transferred at a single command.
Enabled.
Disabled.
PCI Master 0 WS Write: When Enabled, writes to the PCI bus are command with
zero wait states.
Enabled.
Disabled.
PCI Delay Transaction: The chipset has an embedded 32-bit posted write buffer
to support delay transactions cycles. Select Enabled to support compliance with
PCI specification version 2.1.
Enabled.
Disabled
PCI #2 Access #1 Retry: This item allows you enabled/disable the PCI #2 Access
#1 Retry.
Enabled.
Disabled.
Memory Parity/ECC Check: Use this option to configure the type of DRAM in
your system. The default is Disabled.
Enabled: If your memory is ECC memory, choose this option.
Disabled: If your memory is Non-ECC memory, choose this option.