Hardware Design 2-5
2-3 System Memory Configuration
This mainboard supports different type of settings for the system memory. The
following figures and table provides all possible memory combinations.
>
12
12
>
DIMM2
32MB x
1
16MB
MAX.=
384MB
8MB
BANK 2
BANK 0
128MB
>
12
12
DIMM1
BANK 1
12
12
12
12
DIMM3
64MB
32MB x
1
16MB
8MB
128MB
64MB
32MB x
1
16MB
8MB
128MB
64MB
DIMM 1 DIMM 2 DIMM 3 TOTAL
BANK 0 BAMK 1 BANK 2 MEMORY
This mainboard supports 2 kinds of powerful and flexible SDRAM frequency
selections. These can be synchronous with CPU bus clock or fixed as 66MHz. By
implementing the VCS (Virtual Clock Synchronization) technology, this
mainboard refers to the use of delay-lock-loop (DLL) to enable synchronous and
pseudo-synchronous operation of the processor and DRAM, AGP and PCI buses.
The JP5 allows user to set the SDRAM Frequency between 66/100MHz.
1
JP5
SDRAM Clock Selection
1-2 : Fixed as 66MHz
2-3 : SDRAM Clock = CPU Bus Clcok
Jumper's position:
1-2 : Pseudo-synchronous Status(Fixed as 66MHz)
A more stable and compatible operation condition for non-100MHz based SDRAM
when you are using 100MHz based CPU. This setting is suitable for those users
who are like to remain the usage of current SDRAM module.
2-3 : Synchronous Status(SDRAM Clock= CPU Bus Clock)
Increasing the bus speeds from the traditional 66MHz to 100MHz greatly improves
system performance because the speed at which data traveling between the CPU
and memory is increased by 50%. However, there is one thing you should bear in
mind. Please make sure you are using 125MHz(-8) based or above SDRAM
module.
