24
Manual
Rev. A
Passive Release
When Enabled, CPU to PCI bus accesses are allowed during passive re-
lease. Otherwise, the arbiter only accepts another PCI master access to local
DRAM. The Choice: Enabled, Disabled.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay trans-
actions cycles. Select Enabled to support compliance with PCI specification
version 2.1. The Choice: Enabled, Disabled.
AGP Aperture Size (MB)
Select the size of the Accelerated Graphics Port (AGP) aperture. The aper-
ture is a portion of the PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the aperture range are forwarded
to the AGP without any translation. See www.agpforum.org for AGP informa-
tion. The choice: 4, 8, 16, 32, 64, 128, 256
