Energy micro EFM32-G8XX-STK, User Manual

Page: 32 / 40

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Control MCU Power & Bypass
J-Link LED Debug out LED
PCB_REV0
PCB_REV1
CLK_SEL
CTRL_MCU_TCK_SWCLK
CTRL_MCU_TMS_SWDIO
CTRL_MCU_TDI
TCK_IN
CTRL_MCU_#TRST
#RESET_IN
TDO_SWO_IN
#TRST_OUT
TDI_OUT
TMS_OUT
TCK_OUT
#TRST_IN
TDI_IN
TMS_IN
CTRL_MCU_TDO_SWD
AEM_CTRL0
AEM_CTRL1
AEM_CTRL2
AEM_CTRL3
BOARD_REV0
BOARD_REV1
BOARD_REV1
BOARD_REV0
GND
GND
GND
GND
GND
GND
ADC_VREF
GND
3V3
3V3 3V3
3V3
GND GND
3V3
3V3
GND GND
3V3
3V3
GND
3V3 3V3
GND
3V3 3V3
3V3
GND
CTRLMCU_DEBUG_#RESET
CTRLMCU_SPI_SCK
CTRLMCU_SPI_MOSI
CTRLMCU_SPI_#CS
CTRLMCU_SPI_MISO
DEBUG_TMS_SWDIO_IN (p 9)
DEBUG_TDI_IN (p 9)
DEBUG_#TRST_IN (p 9)
DEBUG_TDO_SWO_IN (p 9)
DEBUG_TMS_SWDIO_#OE (p 9)
DEBUG_BUF_#OE (p 9)
AEM_SENSE_VOLTAGE (p 8)
DEBUG_TCK_SWCLK_IN (p 9)
DEBUG_EXT_CABLE_ATTACH (p 9)
AEM_SENSE_CURRENT_RANGE2 (p 8)
DEBUG_EXT_VDD_TARGET (p 9)
AEM_SENSE_CURRENT_RANGE1 (p 8)
DEBUG_#RESET_IN (p 9)
CTRLMCU_SPI_MISO
USBDP (p 7)
USBDM (p 7)
DEBUG_#RESET (p 9)
DEBUG_#TRST_OUT (p 9)
DEBUG_TCK_SWCLK_OUT (p 9)
DEBUG_TMS_SWDIO_OUT (p 9)
DEBUG_TDI_OUT (p 9)
AEM_VMCU_ENABLE (p 8)
CTRLMCU_SPI_#CS
CTRLMCU_DEBUG_#RESET
CTRLMCU_SPI_SCK
CTRLMCU_SPI_MOSI
DEBUG_DH_SW_ENABLE (p 9)
DEBUG_MCU_SW_ENABLE (p 9)
BC_TX (p 3)
BC_RX (p 3)
CTRLMCU_I2C_SDA (p 7)
CTRLMCU_I2C_SCL (p 7)
AEM_CTRL[3..0] (p 8)
EEPROM_WP (p 7)
3V3_SENSE (p 7)
5V_SENSE (p 7)
MCU_DEBUG_ISOLATE_#EN
BOARD_REV[1..0]
BOARD_REV[1..0]
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
A03 BRD2001A
Tuesday, June 29, 2010
10 10
A3
GB
<OrgAddr2>
EFM32 Starter Kit
<Cage Code>
Saturday, March 21, 2009
Wednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
A03 BRD2001A
Tuesday, June 29, 2010
10 10
A3
GB
<OrgAddr2>
EFM32 Starter Kit
<Cage Code>
Saturday, March 21, 2009
Wednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
Size
Designed:
Revision
Sheet
of
Approved:
Sheet Created Date Sheet Modified Date
Document number
Schematic Title
Design Created Date:
BOM Doc No:
Page Title
A03 BRD2001A
Tuesday, June 29, 2010
10 10
A3
GB
<OrgAddr2>
EFM32 Starter Kit
<Cage Code>
Saturday, March 21, 2009
Wednesday, December 03, 2008
TOP
<Schematic Path>
Control MCU
C916
100N
C916
100N
TP909 TP909
C910
100N
C910
100N
R900
2K R900
2K
U902A
M25PX16
U902A
M25PX16
D
5
C
6
HOLD
7
Q
2
W
3
S
1
R917
100K
NM
R917
100K
NM
U900C
Control MCU
U900C
Control MCU
NRST
E1
BOOT0
D5
OSC_IN
C1
OSC_OUT
D1
VBAT
B2
VREF-
H1
VREF+
J1
VSSA
G1
VDDA
K1
VDD_1
F7
VDD_2
F6
VDD_3
F5
VDD_4
F4
VDD_5
D2
VSS_1
E7
VSS_2
E6
VSS_3
E5
VSS_4
E4
VSS_5
C2
NC
F8
R911
0R R911
0R
C903
12P C903
12P
LED900
YELLOW LED900
YELLOW
2
1
LED902
YELLOW
LED902
YELLOW
2
1
TP923 TP923
TP908 TP908
LED903
RED LED903
RED
2
1
R910
1R R910
1R L900
BLM21B102S
L900
BLM21B102S
1 2
U902B
M25PX16
U902B
M25PX16
VCC
8
VSS
4
R914
10K R914
10K
C912
100N
C912
100N
R916
0R R916
0R
TP902 TP902
C907
10U C907
10U
C915
10U
C915
10U
PORT A
PORT B
PORT C
U900A Control MCU
PORT A
PORT B
PORT C
U900A Control MCU
PA0 / WKUP / USART2_CTS / ADC123_IN0 / TIM2_CH1_ETR / TIM5_CH1 / TIM8_ETR
G2
PA1 / USART2_RTS / ADC123_IN1 / TIM5_CH2 / TIM2_CH2
H2
PA2 / USART2_TX / ADC123_IN2 / TIM5_CH3 / TIM2_CH3
J2
PA3 / USART2_RX / ADC123_IN3 / TIM5_CH4 / TIM2_CH4
K2
PA4 / SPI1_NSS / DAC_OUT1 / USART2_CK / ADC12_IN4
G3
PA5 / SPI1_SCK / DAC_OUT2 / ADC12_IN5
H3
PA6 / SPI1_MISO / TIM8_BKIN / ADC12_IN6 / TIM3_CH1 [TIM1_BKIN]
J3
PA7 / SPI1_MOSI / TIM8_CH1N / ADC12_IN7 / TIM3_CH2 [TIM1_CH1N]
K3
PA8 / USART1_CK / TIM1_CH1 / MCO
D9
PA9 / USART1_TX / TIM1_CH2
C9
PA10 / USART1_RX / TIM1_CH3
D10
PA11 / USART1_CTS / CANRX / TIM1_CH4 / USBDM
C10
PA12 / USART1_RTS / CANTX / TIM1_ETR / USBDP
B10
PA13 / JTMS-SWDIO
A10
PA14 / JTCK-SWCLK
A9
PA15 / JTDI
A8
PB0 / ADC12_IN8 / TIM3_CH3 / TIM8_CH2N
J4
PB1 / ADC12_IN9 / TIM3_CH4 / TIM8_CH3N
K4
PB2 / BOOT1
G5
PB3 / JTDO / TRACESWO / SPI3_SCK / I2S3_CK [TIM2_CH2 / SPI1_SCK]
A7
PB4 / JNTRST / SPI3_MISO [TIM3_CH2 / SPI1_MISO]
A6
PB5 / I2C1_SMBAI / SPI3_MOSI / I2S3_SD [TIM3_CH2 / SPI1_MOSI]
C5
PB6 / I2C1_SCL / TIM4_CH1 [USART1_TX]
B5
PB7 / I2C1_SDA / FSMC_NADV / TIM4_CH2 [USART1_RX]
A5
PB8 / TIM4_CH3 / SDIO_D4 [I2C1_SCL / CANRX]
B4
PB9 / TIM4_CH4 / SDIO_D5 [I2C1_SDA / CANTX ]
A4
PB10 / I2C2_SCL / USART3_TX [TIM2_CH3]
J7
PB11 / I2C2_SDA / USART3_RX [TIM2_CH4]
K7
PB12 / SPI2_NSS / I2S2_WS / I2C2_SMBAI / USART3_CK / TIM1_BKIN
K8
PB13 / SPI2_SCK / I2S2_CK / USART3_CTS / TIM1_CH1N
J8
PB14 / SPI2_MISO / TIM1_CH2N / USART3_RTS
H8
PB15 / SPI2_MOSI / I2S2_SD / TIM1_CH3N
G8
PC0 / ADC123_IN10
F1
PC1 / ADC123_IN11
F2
PC2 / ADC123_IN12
E2
PC3 / ADC123_IN13
F3
PC4 / ADC12_IN14
G4
PC5 / ADC12_IN15
H4
PC6 / I2S2_MCK / TIM8_CH1 / SDIO_D6 [TIM3_CH1]
F10
PC7 / I2S3_MCK / TIM8_CH2 / SDIO_D7 [TIM3_CH2]
E10
PC8 / TIM8_CH3 / SDIO_D0 [TIM3_CH3]
F9
PC9 / TIM8_CH4 / SDIO_D1 [TIM3_CH4]
E9
PC10 / UART4_TX / SDIO_D2 [USART3_TX]
B9
PC11 / UART4_RX / SDIO_D3 [USART3_RX]
B8
PC12 / UART5_TX / SDIO_CK [USART3_CK]
C8
PC13 / TAMPER-RTC
A2
PC14 / OSC32_IN
A1
PC15 / OSC32_OUT
B1
C905
10N C905
10N
C917
100N
C917
100N
R913 0R
NM
R913 0R
NM
R905
2K R905
2K
R901 1K5 R901 1K5
C914
100N
C914
100N
TP911 TP911
C904
100N C904
100N
U900B
Control MCU
U900B
Control MCU
PD0 / OSC_IN / FSMC_D2 [CANRX]
D8
PD1 / OSC_OUT / FSMC_D3 [CANTX]
E8
PD2 / TIM3_ETR / UART5_RX / SDIO_CMD
B7
PD3 / FSMC_CLK [USART2_CTS]
C7
PD4 / FSMC_NOE [USART2_RTS]
D7
PD5 / FSMC_NWE [USART2_TX]
B6
PD6 / FSMC_NWAIT [USART2_RX]
C6
PD7 / FSMC_NE1 / FSMC_NCE2 [USART2_CK]
D6
PD8 / FSMC_D13 [USART3_TX]
K9
PD9 / FSMC_D14 [USART3_RX]
J9
PD10 / FSMC_D15 [USART3_CK]
H9
PD11 / FSMC_A16 [USART3_CTS]
G9
PD12 / FSMC_A17 [USART3_RTS / TIM4_CH1]
K10
PD13 / FSMC_A18 [TIM4_CH2]
J10
PD14 / FSMC_D0 [TIM4_CH3]
H10
PD15 / FSMC_D1 [TIM4_CH4]
G10
PE0 / TIM4_ETR / FSMC_NBL0
D4
PE1 / FSMC_NBL1
C4
PE2 / TRACECK / FSMC_A23
A3
PE3 / TRACED0 / FSMC_A19
B3
PE4 / TRACED1 / FSMC_A20
C3
PE5 / TRACED2 / FSMC_A21
D3
PE6 / TRACED3 / FSMC_A22
E3
PE7 / FSMC_D4 [TIM1_ETR]
H5
PE8 / FSMC_D5 [TIM1_CH1N]
J5
PE9 / FSMC_D6 [TIM1_CH1]
K5
PE10 / FSMC_D7 [TIM1_CH2N]
G6
PE11 / FSMC_D8 [TIM1_CH2]
H6
PE12 / FSMC_D9 [TIM1_CH3N]
J6
PE13 / FSMC_D10 [TIM1_CH3]
K6
PE14 / FSMC_D11 [TIM1_CH4]
G7
PE15 / FSMC_D12 [TIM1_BKIN]
H7
C908
10N
C908
10N
C911
100N
C911
100N
C900
18P
C900
18P
C913
100N
C913
100N
X900
16MHz
X900
16MHz
2 1
R903
2K R903
2K
TP904 TP904
TP910 TP910
C902
12P C902
12P
R912
2K R912
2K
R915
0R R915
0R
R904 22R R904 22R
C909
10N C909
10N
R909
0R R909
0R
TP901 TP901
TP903 TP903
R902 22R R902 22R
LED901
BLUE LED901
BLUE
2
1
C901
18P
C901
18P
R918
100K R918
100K
P900
NM
P900
NM
1 2
4
8
6
10
3
5
9
7
12
13 14
11
15 16
17
19 18
20
TP900 TP900