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Version 1.09
and 155 for use with SOC modules. Please note that these pins are shared with the FX3 FIFO interface
and must only be used as UART if the FX3 FIFO interface is not used!
Power and data signals on this connector are protected against ESD incidents.
2.8.3
J500
–
USB 3.0 B Connector
This USB connector can be used in two modes:
a)
S1200-3 is off: The Cypress FX3 USB 3.0 controller
’s USB signals are routed to
J500 and allow
300 MB/s high speed communication between the host computer and Mars PM3 Board.
b)
S1200-3 is on: If the inserted Mars module features a USB controller, the USB signals of this
module are routed to J500 to allow device mode operation. In this mode only USB 1.1 and 2.0
are supported.
This connector has the power and data signals protected against ESD incidents.
2.8.4
J501
–
USB 2.0 A Connector
If the inserted Mars module features a USB controller, the USB signals of this module are connected to
J501 and allow USB host mode operation. The power output on J501 can be switched on and off using
the signal USB_CPEN that controls a USB load switch U502. Power and data signals on this connector
are ESD protected.
2.8.5
J700
–
RJ45 Ethernet
This connector can be operated in two modes:
a)
If the inserted Mars module supports gigabit Ethernet, then this port provides one gigabit
Ethernet link.
b)
If the inserted Mars module supports dual 100 MBit Ethernet, then this port provides two 100
MBit Ethernet links using an external adapter.
There is no need to set the Ethernet mode on the DIP switch as in previous versions anymore.
2.8.6
J800
–
FPGA JTAG Connector
The FPGA JTAG connector allows accessing the JTAG port of the inserted FPGA module. The signals on
this connector are protected against ESD incidents.
For easier connection of the Xilinx and Altera JTAG programmers there is a breakout board with the
standard connectors available. This adapter is included in the hardware kits only. If you order a single
Mars PM3 please ask for a JTAG-PM3 if you need the adapter board.
Warning
The JTAG pins are connected to the FPGA with only small series impedance. Only apply
VCC_IO compliant voltages to the IO pins. Any other voltages may damage the FPGA
as well as other devices on the Mars PM3 Board or the installed Mars FPGA module.