Emerson NITX-300-ET-DVI, Installation And Use Manual

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Functional Description
NITX-300-ET-DVI Installation and Use (6806800N97A)
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4.3 System Memory
The Tunnel Creek integrated a single channel 32-bit non ECC DDR2 controller, it supports up to
1GB DDR2 memory at 800MHz.
There are 8 1Gb X 8 data width DRAM chips which forms a two Rank total 1GB memory
capacity topology. And for some low-end configuration, the DRAM chips can be configured as
one Rank topology which is a 512MB solution.
General Purpose I/O (GPIO) The Tunnel Creek processor contains a total of 14 GPIO pins. Five of
these GPIOs are powered by core power rail and are turned off during
sleep mode (S3 and higher). Nine of these GPIOs are powered by the
suspend power well and remained active during S3. Four of the GPIOs
in suspend power well can be used to wake the system from the
Suspend-to-RAM state. The GPIOs are not 5V tolerant.
Serial Peripheral Interface (SPI) The Tunnel Creek processor contains a SPI interface that supports
boot from SPI flash. This interface only supports BIOS boot.
Power Management The processor contains full support for the Advanced Configuration
and Power Interface (ACPI) Specification, Revision 3.0.
Watchdog Timer (WDT) The Tunnel Creek processor supports a user configurable watchdog
timer. It contains selectable prescaler approximately 1 microsecond
to 10 min. When the WDT triggers, GPIO [4] will be asserted.
Package The Tunnel Creek processor is a 676 solder balls with 0.8mm ball
pitch Flip Chip Ball Grid Array (FCBGA). The package dimensions are
22mm x 22mm, Z-height is 2.097mm -2.35mm.
Table 4-1 Tunnel Creek Processor Features
Feature Description