Emerson DVL100E, Service Manual

Page: 17 / 48

1-6-3 E5925BLD
Digital Signal Process Block Diagram ( DVL700E )
C1
6
D1
8
A1
7
B1
5
E1
4
F1
2
D
V
D-LD
8
CD-LD
10
PD-MONI
7
FS(+)
2
FS(-)
3
TS(+)
1
TS(-)
4
CN201 CN201 CN201
IC201 (SW)
IC503
(SDRAM)
IC101
(MICR
O CONTR
OLLER)
FS
FS(+)
CD/D
VD
FS(-)
TS(+)
TS(-)
TS
DETECT
OR
CD/D
VD
19
Q251,Q252
CD
D
V
D
AMP
Q253,Q254
AMP
4
1
3
6
GND(D
VD-PD)
6
GND(CD-PD)
5
GND(LD)
9
RF SIGNAL PR
OCESS
CIRCUIT
D
V
D/CD
FORMA
TTER
AU
D
IO
I/F VIDEO I/F
NTSC/P
AL
ENCODER
DMA BCU
INST
.
RO
M
32BIT CPU
DA
T
A
RAM
INTERR
UPT
CONTR
OLLER
W
A
TCH DOG
TIMER
CPU I/F
TIMER
DECODER I/F
CPU I/F
READ MEMOR
Y
DA
T
A
RAM
DSP DECODER
I/O PR
OCESSOR
INST
.
RO
M
DA
T
A
RAM INST
.
RO
M
SERIAL
D/A
GENERAL I/O INTERR
U
PT
CONTR
O
LLER
TIMER W
A
TCH DOG
TIMER REMO
TE
CONTR
OL 32BIT CPU
STREAM I/F
EXTERNAL MEMOR
Y
I/F
SDRAM
ECC
UMA
C
114 115 116 117 132 131 134 133 129 130 126 124 125 123 83
DEB
U
G
BCU
INST RAM
DA
T
A
RAM
D/A D/A D/A
149
158
Y C
Cr
Cb
VIDEO-Y
VIDEO-C
VIDEO-Cr
VIDEO-Cb
177
SPDIF
170
PCM-BCK
171
PCM-D
A
T
A
169
PCM-LRCLK
152 151
23~51
SDRAM D
A
T
A
(0-15)
SDRAM ADDRESS(0-11)
SDRAM ADDRESS(0-11)
217 238
~
1
18 252 256
~ ~
2
13 42 53
~ ~
IC103
(FLASH R
O
M)
FLASH RO
M
29 36 38 45
~ ~
D
A
T
A(VIDEO/A
UDIO) SIGNAL
VIDEO SIGNAL
D
A
T
A(A
UDIO) SIGNAL
22 26 29 35
~ ~
FDQ (0-15)
~
1 9
16 25 48
~
192~212
F
A
DR (0-19)
SDRAM D
A
T
A
(0-15)
PICK-UP UNIT
T
O
SYSTEM
CONTR
OL/SER
V
O
BLOCK DIA
GRAM
D
V
D MAIN CB
A UNIT
T
O
VIDEO
/A
UDIO
BLOCK DIA
GRAM
T
O
VIDEO
/A
UDIO
BLOCK DIA
GRAM