EMC Symmetrix DMX-3, Product Manual, Page: 238 / 326

238 EMC Symmetrix DMX-3 Product Guide
Mainframe Features and Support
Deleting (and then
adding) devices
online Enginuity level 5772 systems support removing and then adding
devices online, which facilitates the following configuration
enhancements:
◆
Change Device Emulation Online — Remove a CKD volume and
add an FBA volume.
◆
Convert between mirrored and RAID protected volumes.
◆
The optimal order is to delete devices and then add. If done in the
reverse order, unnecessary global memory will be allocated for
the deleted devices.
◆
When attempting to add or delete devices, or change protection
type of devices, a new minimum cache value will be calculated.
In rare cases this new value could prohibit the changes until
additional memory is added to the system.
Support for 64 K
cylinders
Enginuity level 5772 supports 64 K cylinder CKD devices for
operating systems that can exploit it.
FICON Cascading
and Open Systems
Intermix
configurations In addition to the standard direct-connect configuration, Symmetrix
DMX FICON models support the use of Cascading and Open
Systems Intermix configurations. Cascading can be used to reduce
the number of FICON adapters and the amount of intersite cabling
required by making use of switch-to-switch communication.
Intermix allows FICON zones to be added to existing Open Systems
switches within a site and between sites. These two features help
reduce the overall costs while providing greater FICON connectivity,
backup, and recovery.
Note: For specific Cascading and Open System Intermix configuration
requirements, contact your local EMC Sales Representative.
FICON Cascading configurations
Cascading provides greatly enhanced FICON connectivity within
local and remote sites through the use of switch-to-switch extensions
of the CPU to the DMX FICON network. These cascaded switches
communicate over long distances using a small number of high speed
lines called ISLs (InterSwitch Links). Up to a maximum of two
switches may be connected together within a path between the CPU
and the DMX.