LPC3131/41 Developer’s Kit - User’s Guide
Page 24
Copyright 2012 © Embedded Artists AB
4.6
NAND Boot Problem Fix
This note does
NOT
affect boards marked with WO-0246-1033. See picture below where to find
production marking. The picture illustrates a board that is not affected. The last four numbers represent
a year-week marking. ‘1033’ means produced: 2010, week 33. Boards marked with production dates
earlier than 1033
are
affected.
Figure 6 – LPC31xx Base Board Production Marking
Note that there is a conflict on the databus when booting via NAND flash. The problem is that signals
N_STCS0 and N_STCS1 are low during NAND boot. The signal DBUF_EN on the
LPC31xx Base
Board
is formed by AND:ing N_STCS0 and N_STCS1. This, in turn, enables the databus buffer (U16
on
LPC3131/41 OEM Board
) when the DBUF_EN jumper (pin 1-2 on J40) is inserted on the
LPC31xx
Base Board
. See
Figure 7
to locate DBUF_EN jumper on the
LPC31xx Base Board
.
After NAND flash boot is completed the active level changes for the signals N_STCS0 and N_STCS1.
Their inactive state is then high and their active state is low, just as expected for memory bus chip
select signals. There is unfortunately no way to detect when the NAND boot process is complete.
There are however two workarounds for this problem:
Production
marking
