Ectron 441A, Instructions Manual, Page: 48 / 74

SIGNAL CONDITIONING (HARDWARE)
The two signal inputs feed a differential amplifier with a gain of 0.2, the single-ended output
of which is limited to approximately 1.2 V. Therefore, input voltages in excess of about 7 V
are limited at the output of this stage. This limiting does not affect the input impedance of
the Model 441A.
After the limiting stage, the signal passes through an ac-coupling capacitor, which removes
any dc component of the signal.
The signal next feeds through an amplifier, the gain of which is automatically controlled to
keep the peak-to-peak voltage of its output at a constant level. This ensures that input signals
of varying levels will be properly detected.
The signal then feeds to the microcontroller, which detects high-to-low transitions. High-to-
low transitions are detected since many signal sources produce faster fall times than rise
times. When the input signal contains significant noise, any uncertainty in transition detection
results in uncertainty in frequency measurement. Slow transition times can cause transition-
detection uncertainties when the signal contains noise.
FREQUENCY MEASUREMENT (FIRMWARE)
Frequency measurement is based on the time period between high-to-low transitions of the
input signal. If the period of time between high-to-low transitions of the input signal is
greater than one millisecond, frequency is determined by taking the reciprocal of each signal
period. If the period of time is less than one millisecond, high-to-low transitions are accu-
mulated until one millisecond has elapsed. Frequency is then determined by dividing the
number of transitions accumulated by the period of time required to accumulate those tran-
sitions. Granularity in period measurement is 667 ns, and the frequency is measured no
faster than once per millisecond.
TRANSFER FUNCTION (FIRMWARE)
Once the frequency has been determined, output scaling and offset must be applied to de-
termine the proper output voltage.
First, the measured frequency is subtracted from the lower-frequency set-point. Then, that
difference is multiplied by the difference between the upper- and lower-voltage set-points,
and then that value is divided by the difference between the upper- and lower-frequency set
points. A correction factor is added to compensate output-stage component variations, and
the resulting value is fed to the output DAC (digital-to-analog converter). This correction
factor is determined by the plus- and minus-ten-volt alignment made during setup.
The firmware has the capability of performing the entire process 1000 times per second, so
the output voltage will properly represent the frequency of a particular cycle of the input
signal approximately one millisecond after a low-to-high transition of the signal (for input
signals of one millisecond or greater period).
OUTPUT STAGES (HARDWARE)
The output stages consist of a 14-bit DAC, an analog filter, and an output driver. These
circuits provide an output voltage range of approximately plus and minus eleven volts. The
filter is low-pass, two-pole, with Bessel characteristics; and is factory set to 1 Hz, 10 Hz,
and 100 Hz cutoff frequencies. The wideband position available from the front panel sub-
Theory of Operation Model 441A
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