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Amplifier Board Theory of Operation
VMID Generator
The following discussion refers to Figure 16. The no-signal DC output voltage of the
power amplifiers is set to half the supply voltage. That voltage appears across the clamp
mounted C7s so that there is no DC voltage on the speakers. The VMID generator
generates a clean and quiet voltage at half the supply voltage or approximately 36 volts.
Q1 and Q2 form a compound amplifier that generates VMID.
R1 and R2 set the input voltage to the Q1-Q2 amplifier,
C2 filters that input voltage to make it quiet,
D5 manages the charge on C2 during turn-off
C1 frequency compensates the Q1-Q2 amplifier, keeping it stable
R7 and R8 take a bit of the dissipation of the Q1-Q2 amplifier and provide a
convenient place to monitor the current it delivers.
D1, D4 and R4 generate VMIDL, the VMID for the left channel.
D2, D3, and R5 generate VMIDR, the VMID for the right channel.
Sound Node
The SOUND node generates a voltage that mutes the amplifier input by about 20 dB until
just after the speaker relays close.
When RLYDRV is high, the speaker relays are not energized.
Q4 is turned on, and the SOUND node is low, which mutes the amplifier input.
Once RLYDRV goes low:
Q4 turns off.
C19 charges, and the SOUND node rises to about 12 Volts, which stops the
muting action.
If RLYDRV then goes high again (e.g. during power amplifier turn-off):
Q4 discharges C19, grounding the sound node, and restoring the mute function for
the next turn-on cycle.
Power Amplifiers
The following discussion refers to Figure 17. The part numbers cited will be for the left
channel, the equivalent right channel parts are easily seen by looking at the same place in
the lower half of the diagram.
R15 provides an input loading resistance that in aggregrate is similar to what the
old SCA80 power amp provided. This keeps the tone control action unchanged.
R14 and Q5 provide the muting circuit discussed in the previous section. When
SOUND is at 12 V, there is no muting. When SOUND is near ground, Q5 shows
a low impedance that mutes the input signal.
C5 provides a little bandwidth limiting to the input signal.
VMIDL is filtered even more than VMID by the action of C16.
C6 is the input coupling capacitor.
